Age | Commit message (Collapse) | Author |
|
When probing multiple interfaces (according to the result from the
board_boot_order function), we need to ensure that only valid FIT
images are considered and disable the fallback to assuming that
a raw (binary-only) U-Boot image is loaded (to avoid hangs/crashes
from jumping to random content loaded from devices that in the
probing order which do not contain a valid image).
When the SPL_LOAD_FIT configuration option is enabled, the new
SPL_LOAD_FIT_ONLY option becomes available to disable such fallback
paths.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
|
We assume that any (i.e. the first) FDT contained fits our board
and simply return a positive match every time.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
|
As SPL can probe multiple interfaces, we can let it do the work for
FIT images and simply provide the board_boot_order hook.
This mechanism is fully implemented for sun9i (i.e. A80) platforms
and falls back to the old mechanism of determining a single boot
device for older/other platforms for now.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
|
In raw mode a full sector is to be read even if image covers part of
a sector. Number of sectors are calculated as ROUND_UP(size)/sec_size by FIT
framework. This calculation assumes that image is at the 0th offset of a sector,
which is not true always in FIT case. So, include the image offset while
calculating number of sectors.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
|
|
The next stage boot loader image and the selected FDT can be post-
processed by board/platform/device-specific code, which can include
modifying the size and altering the starting source address before
copying these binary blobs to their final destination. This might be
desired to do things like strip headers or footers attached to the
images before they were packaged into the FIT, or to perform operations
such as decryption or authentication. Introduce new configuration
option CONFIG_SPL_FIT_IMAGE_POST_PROCESS to allow controlling this
feature. If enabled, a platform-specific post-process function must
be provided.
Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
When no DTB can be matched successfully to the board that's being used
a list of available FIT-embedded DTBs will be output to the console for
diagnostic purposes. But rather than the contents of the "description"
FDT property a non-existent property was accessed and as a result "NULL"
was output instead of the actual name(s) of the DTB(s). Fix this issue
by using the correct property which is also the exact same property
that's used earlier during the actual board matching process.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
|
|
When loading fit header, it should be loaded to a previous address
aligned to ARCH_DMA_MINALIGN and not 8. Fixing the same.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
|
|
This provides a way to load a FIT containing U-Boot and a selection of device
tree files from a File system. Making sure that all the reads and writes
are aligned to their respective needs.
Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Make this still apply with Michal's alignment change for 'fit']
Signed-off-by: Tom Rini <trini@konsulko.com>
|
|
No prints should be allowed during UART load.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
|
|
sectors field is not being updated when reading fdt from fit image. Because of
this size_of(u-boot.bin) is being read when reading fdt. Fixing it by updating
the sectors field properly.
Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
|
|
If bl_len is not aligned it can caused a problem because another code
expects that start is aligned.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
When FDT is not present in the image user doesn't get any error what's
wrong. Print error message if LIBCOMMON_SUPPORT is enabled.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Seris-cc: uboot
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
command that returns true if the first mmc device is the on-board emmc.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
|
|
|
|
set CLKB_OUT to 12MHz output and reset the onboard
USB, HSIC hub and GL830 USB to SATA bridge.
|
|
Including "u-boot#" in the prompt makes it clear to the user that
he is in the u-boot shell and not in Linux.
|
|
when powered by ATX the SUS3 line must be HIGH to enable the ATX
power supply.
|
|
we need to do board specific things that we can't select only based on
the CPU flavor. So we introduce the Kconfig option to select a specfic
sunxi board
|
|
This adds a DTS and a defconfig for the A80-Q7 (a system-on-module
compatible with the Qseven form-factor developed and supported by
Theobroma Systems).
|
|
|
|
Throughput tests have shown the sunxi_mmc driver to take over 10s to
read 10MB from a fast eMMC device due to excessive delays in polling
loops.
This commit restructures the main polling loops to use get_timer(...)
to determine whether a (millisecond) timeout has expired. We choose
not to use the wait_bit function, as we don't need interruptability
with ctrl-c and have at least one case where two bits (one for an
error condition and another one for completion) need to be read and
using wait_bit would have not added to the clarity.
The observed speedup in testing is greater than 10x (e.g. a 10MB write
decreases from 9.302s to 0.884s).
X-Affected-platforms: A31-uQ7, A80-Q7
|
|
|
|
|
|
The driver currently only supports sun6i.
Signed-off-by: Octav Zlatior <octav.zlatior@theobroma-systems.com>
|
|
Our initial clock setup had been based on the basic_bootloader (boot0),
but differed from what Allwinner used in their SDK in 'u-boot-2011.09'.
To improve compatibility, we now switch to the same clocking they have
used.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
|
The chip-id on the sun9i resides in the SID block, but at an offset
from what we'd expect with older variants.
|
|
|
|
On A80 boards, both a AXP809 (primary) and AXP806 (secondary)
PMIC are found. The AXP806 supplies the Cortex-A15 cores with
a poly-phase supply to deliver up to 10A of total power.
When used in the slave configuration, the AXP806 needs a write
to the REGADDR_EXT register to configure it to work on the same
RSB bus as the primary PMIC.
|
|
Implement support for the AXP809 PMIC that is used on A80 platforms
as the primary PMIC and powers most peripherals and the CPUA (Cortex-A7)
cluster. A AXP806 is usually the slave PMIC, which will provide the
power for the CPUB (Cortex-A15) cluster.
The default voltage settings have been chosen to be safe values for a
Optimus, Cubieboard and A80-Q7. These changes are validated against the
A80-Q7 module.
|
|
Implement driver to wrap RSB in a device-model I2C driver.
|
|
some older compilers generate less than compact code
we thus use 32KB (of 40KB) for SPL
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
We can not define CONFIG_PHY_ADDR in sunxi-common.h, as this will
break devices that have a different PHY_ADDR and rely on the PHY
address autodetection (phy_find_by_mask) to detect the address.
|
|
* board/sunxi/gmac.c(eth_init_board): Add support for configuring
sun9i (A80) for Ethernet support in RGMII mode.
* arch/arm/include/asm/arch-sunxi/gpio.h (SUN9I_GPA_GMAC): Define.
* arch/arm/include/asm/arch-sunxi/clock_sun9i.h: Add Ethernet support
for sun9i (A80), defining struct sunxi_sysctl_reg (which contains
the GMAC clock control on sun9i) and AHB_{GATE,RESET}_OFFSET_GMAC
* arch/arm/include/asm/arch-sunxi/cpu_sun9i.h(SUNXI_SYSCTL_BASE):
Define.
* arch/arm/dts/sun9i-a80.dtsi: add device-tree support for GMAC on
sun9i (A80).
|
|
* arch/arm/cpu/armv7/sunxi/board.c (gpio_init): Configure UART4
pins and function for CONFIG_CONS_INDEX == 5 (UART4) on
CONFIG_MACH_SUN9I
* include/configs/sunxi-common.h: Define CONFIG_SYS_NS16550_COM5
and CONFIG_SYS_NS16550_COM6 for CONFIG_MACH_SUN9I to refer to
UART4 and UART5, respectively. Define OF_STDOUT_PATH for
CONFIG_CONS_INDEX == 5 (UART4) on CONFIG_MACH_SUN9I
* arch/arm/include/asm/arch-sunxi/gpio.h (SUN9I_GPG_UART4): Define.
Validated against A80-Q7 module.
|
|
|
|
On sun9i, the GTBUS manages transaction priority and bandwidth
for multiple read ports when accessing DRAM. The initialisation
mirrors the settings from Allwinner's boot0 for now, even though
this may not be optimal for all applications (e.g. headless
systems might want to give priority to IO modules).
Adding a common callout to gtbus_init() from the SPL clock init
with a weakly defined implementation in sunxi/clock.c to fallback
to for platforms that don't require this.
|
|
This adds DRAM initialisation code for sun9i, which calculates the
appropriate timings based on timing information for the supplied
DDR3 bin and the clock speeds used.
With this DRAM setup, we have verified DDR3 clocks of up to 792MHz
(i.e. DDR3-1600) on the A80-Q7 using a dual-channel configuration.
|
|
The description was borrowed from kernel. "tristate" type was changed
to "bool" (I believe we don't support modules for u-boot yet, right?).
CONFIG_USB_GADGET requires CONFIG_USB to be defined too, so add it along
as well.
Definitions were added to defconfig files in a way that
"make savedefconfig" generates exactly the same file as used defconfig.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
[trini: Add zynq_zc702 conversion]
Signed-off-by: Tom Rini <trini@konsulko.com>
|
|
Add command-line specification of xmodem timeout. If the binary
header needs to take a while to do something (e.g. DDR ECC
scrubbing), the xmodem transfer can time out. Add a configurable
xmodem block timeout to allow transfers with slow binary headers
to succeed.
Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
Usage text was getting unwieldy and somewhat incorrect. The
usage summary implied that some options were mutually exclusive
(e.g. -q or -s). Clean up the summary to just include the
important ones, and include a generic "[OPTIONS]" instead.
Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
It has been superseded in kwbimage.cfg in favor of an SPL in commit
9e30b31d20f0b793465d07f056b3d9885f578c0d (arm: mvebu: db-88f6820: Add
SPL support with DDR init code). Found via code review.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
This patch adds support for Altera StratixV bitstream programming. 2 FPGAs
are connected to the SPI busses. This patch uses board specific write
code to program the bitstream via SPI direct write mode.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
The direct write config register is needed for SPI direct write mode
configuration.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Signed-off-by: Stefan Roese <sr@denx.de>
|