diff options
| author | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2016-09-18 12:24:16 +0200 |
|---|---|---|
| committer | Klaus Goger <klaus.goger@theobroma-systems.com> | 2016-09-18 15:57:27 +0200 |
| commit | 3ccb81251d5e84f53bce17a18a21538d5f2eb0ea (patch) | |
| tree | acda0dbeabf60050abcf20c2ac291ce959c57cfb | |
| parent | 5a7df64aa96692ffb2043ffdda5200ef1b86fe55 (diff) | |
ARM: sun9i: SPI support for sun9i
| -rw-r--r-- | arch/arm/dts/sun9i-a80.dtsi | 22 | ||||
| -rw-r--r-- | drivers/spi/sunxi_spi.c | 9 | ||||
| -rw-r--r-- | drivers/spi/sunxi_spi.h | 12 |
3 files changed, 37 insertions, 6 deletions
diff --git a/arch/arm/dts/sun9i-a80.dtsi b/arch/arm/dts/sun9i-a80.dtsi index f9e277015c..3cc8566039 100644 --- a/arch/arm/dts/sun9i-a80.dtsi +++ b/arch/arm/dts/sun9i-a80.dtsi @@ -302,6 +302,14 @@ "mmc3_sample"; }; + spi0_clk: clk@06000430 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x06000430 0x4>; + clocks = <&osc24M>, <&pll12>; + clock-output-names = "spi0"; + }; + ahb0_gates: clk@06000580 { #clock-cells = <1>; compatible = "allwinner,sun9i-a80-ahb0-gates-clk"; @@ -913,6 +921,20 @@ #size-cells = <0>; }; + spi0: spi@01c1a000 { + compatible = "allwinner,sun6i-a31-spi"; + reg = <0x01c1a000 0x1000>; +/* interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; */ + clocks = <&ahb0_gates 20>, <&spi0_clk>; + clock-names = "ahb", "mod"; +/* + dmas = <&dma 23>, <&dma 23>; + dma-names = "rx", "tx"; +*/ + resets = <&ahb0_resets 20>; + status = "disabled"; + }; + r_wdt: watchdog@08001000 { compatible = "allwinner,sun6i-a31-wdt"; reg = <0x08001000 0x20>; diff --git a/drivers/spi/sunxi_spi.c b/drivers/spi/sunxi_spi.c index 5455f4b7a5..f9eeb8fe11 100644 --- a/drivers/spi/sunxi_spi.c +++ b/drivers/spi/sunxi_spi.c @@ -3,6 +3,7 @@ * * Supported chips * - Allwinner A31 (sun6i) + * - Allwinner A80 (sun9i) * * Copyright (C) 2015 Theobroma Systems Design und Consulting GmbH * Octav Zlatior <octav.zlatior@theobroma-systems.com> @@ -14,18 +15,19 @@ * the License, or (at your option) any later version. */ +#include <config.h> #include <common.h> #include <dm.h> #include <spi.h> #include <fdtdec.h> #include <asm/errno.h> -#include <configs/sun6i.h> #include <asm/io.h> -#include <asm/arch-sunxi/gpio.h> -#include <asm/arch-sunxi/clock_sun6i.h> +#include <asm/arch/gpio.h> +#include <asm/arch/clock.h> #include "sunxi_spi.h" + DECLARE_GLOBAL_DATA_PTR; // some arrays to make things easier to express @@ -64,7 +66,6 @@ static int _sunxi_spi_xfer(struct sunxi_spi_reg* spi, unsigned int bitlen, #ifdef CONFIG_SPL_BUILD int i; - printf("_sunxi_spi_xfer %p\n", spi); #if 0 if (dout) { diff --git a/drivers/spi/sunxi_spi.h b/drivers/spi/sunxi_spi.h index 5ae69c2aff..c45e6590d1 100644 --- a/drivers/spi/sunxi_spi.h +++ b/drivers/spi/sunxi_spi.h @@ -3,6 +3,7 @@ * * Supported chips * - Allwinner A31 (sun6i) + * - Allwinner A80 (sun9i) * * Copyright (C) 2015 Theobroma Systems Design und Consulting GmbH * Octav Zlatior <octav.zlatior@theobroma-systems.com> @@ -36,13 +37,20 @@ #define SUNXI_SPI0_MOSI_PIN SUNXI_GPC(0) #define SUNXI_SPI0_MISO_PIN SUNXI_GPC(1) #define SUNXI_SPI0_CLK_PIN SUNXI_GPC(2) +#if defined(CONFIG_MACH_SUN9I) +#define SUNXI_SPI0_CS0_PIN SUNXI_GPC(19) +#define SUNXI_SPI0_CS1_PIN -1 +#define SUNXI_SPI0_CS0_VAL 3 +#define SUNXI_SPI0_CS1_VAL -1 +#else #define SUNXI_SPI0_CS0_PIN SUNXI_GPC(27) #define SUNXI_SPI0_CS1_PIN -1 +#define SUNXI_SPI0_CS0_VAL 3 +#define SUNXI_SPI0_CS1_VAL -1 +#endif #define SUNXI_SPI0_MOSI_VAL 3 #define SUNXI_SPI0_MISO_VAL 3 #define SUNXI_SPI0_CLK_VAL 3 -#define SUNXI_SPI0_CS0_VAL 3 -#define SUNXI_SPI0_CS1_VAL -1 #define SUNXI_SPI1_MOSI_PIN SUNXI_GPG(15) #define SUNXI_SPI1_MISO_PIN SUNXI_GPG(16) |