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authorKlaus Goger <klaus.goger@theobroma-systems.com>2016-09-12 10:47:09 +0200
committerKlaus Goger <klaus.goger@theobroma-systems.com>2016-09-18 20:22:03 +0200
commit4a47429be7548de690e18ded7e4399798054d83d (patch)
treeacf61a047321ea1de7edcb8e42beaa0ed3f3bc0c
parent5f17348aa8898bfc4051d58ad64450a7d0b2f319 (diff)
sun9i: armadillo: set CLKB_OUT and reset USB hubs
set CLKB_OUT to 12MHz output and reset the onboard USB, HSIC hub and GL830 USB to SATA bridge.
-rw-r--r--arch/arm/include/asm/arch-sunxi/clock_sun9i.h9
-rw-r--r--arch/arm/include/asm/arch-sunxi/gpio.h1
-rw-r--r--board/sunxi/board.c19
3 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
index f9ec294aea..bdcbbe9fc5 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
@@ -250,6 +250,15 @@ struct sunxi_sysctl_reg {
#define CCM_GMAC_CTRL_RX_CLK_DELAY(x) ((x) << 5)
#define CCM_GMAC_CTRL_TX_CLK_DELAY(x) ((x) << 10)
+#define CLK_OUTPUT_ENABLE (1 << 31)
+#define CLK_OUTPUT_SRC_SELECT_SHIFT 24
+#define CLK_OUTPUT_SRC_MASK (0b11 << CLK_OUTPUT_SRC_SELECT_SHIFT)
+#define CLK_OUTPUT_SRC_OSC24M_750 (0b00 << CLK_OUTPUT_SRC_SELECT_SHIFT)
+#define CLK_OUTPUT_SRC_X32KI (0b01 << CLK_OUTPUT_SRC_SELECT_SHIFT)
+#define CLK_OUTPUT_SRC_OSC24M (0b10 << CLK_OUTPUT_SRC_SELECT_SHIFT)
+#define CLK_OUTPUT_DIV_N_RATIO(n) (((n - 1) & 0x3) << 20)
+#define CLK_OUTPUT_DIV_M_RATIO(n) (((n - 1) & 0x1f) << 8)
+
#ifndef __ASSEMBLY__
void clock_set_pll1(unsigned int clk);
void clock_set_pll2(unsigned int clk);
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index 46ca759255..16ec467607 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -148,6 +148,7 @@ enum sunxi_gpio_number {
#define SUN9I_GPA_GMAC 2
#define SUN6I_GPA_SDC2 5
#define SUN6I_GPA_SDC3 4
+#define SUN9I_GPA_CLKOUT 4
#define SUN8I_H3_GPA_UART0 2
#define SUN4I_GPB_TWI0 2
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 52792bd364..bc90032866 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -598,6 +598,8 @@ int misc_init_r(void)
unsigned int sid[4];
uint8_t mac_addr[6];
int ret;
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
#if !defined(CONFIG_SPL_BUILD)
setenv("fel_booted", NULL);
@@ -636,6 +638,23 @@ int misc_init_r(void)
if (ret)
return ret;
#endif
+
+#ifdef CONFIG_SUNXI_ARMADILLO
+ sunxi_gpio_set_cfgpin(SUNXI_GPA(11), SUN9I_GPA_CLKOUT);
+ setbits_le32(&ccm->clk_output_b, CLK_OUTPUT_ENABLE |
+ CLK_OUTPUT_SRC_OSC24M | CLK_OUTPUT_DIV_N_RATIO(2));
+
+ gpio_request(SUNXI_GPA(6), "USB HSIC HUB Reset");
+ sunxi_gpio_set_cfgpin(SUNXI_GPA(6), SUNXI_GPIO_OUTPUT);
+ gpio_request(SUNXI_GPE(15), "USB HUB Reset");
+ sunxi_gpio_set_cfgpin(SUNXI_GPE(15), SUNXI_GPIO_OUTPUT);
+ gpio_request(SUNXI_GPG(0), "GL830 Reset");
+ sunxi_gpio_set_cfgpin(SUNXI_GPE(15), SUNXI_GPIO_OUTPUT);
+ gpio_direction_output(SUNXI_GPA(6),1);
+ gpio_direction_output(SUNXI_GPE(15),1);
+ gpio_direction_output(SUNXI_GPG(0),1);
+#endif
+
sunxi_musb_board_init();
return 0;