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path: root/plat/sun50iw1p1/bl31_sunxi_setup.c
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2017-03-08sun50iw1p1: Separate RSB driver from PMIC code.Christoph Muellner
This patch refactors the PMIC code and moves the RSB related code into its own module. This allows other code to access RSB devices as well and make the code more readable. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2017-02-02sun50iw1p1: Perform power-setup before increasing operating clocksPhilipp Tomsich
Increasing the operating clocks may increase the current draw (or require a higher voltage for certain voltage rails). To ensure that we never run into a problem in this area, the initialisation sequence is reordered to first perform the PMIC setup and then reprogram the clocking. X-AffectedPlatforms: A64-uQ7 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2016-11-11avoid PLL_CPUX setup on H5Andre Przywara
It hung for me without it ...
2016-11-10sunxi: add most basic H5 supportAndre Przywara
The Allwinner H5 SoC is quite close to the A64, but will mostly paired with simple I2C voltage controllers in contrast to the complex PMIC A64 boards use these days. Read the SoC ID and only initialize the PMIC when an A64 is detected. Just print the SoC name if it is an H5, the regulator does not need to be setup initially (though we may need it later).
2016-11-10sunxi: print SoC ID on startupAndre Przywara
Each Allwinner SoC contains a SoC ID, which can be used to identify a chip. Add a function to retrieve this value and print it upon initializing ATF.
2016-10-23sunxi: setup basic clocksAndre Przywara
Different ways of booting set up the clocks differently, so lets initialize the basic clocks here to be on the same page.
2016-06-02bl31: output memory location of running codeAndre Przywara
For debugging purposes it seems useful to output the part of memory that ATF is running in. Get the current location of the PC and deduct the SRAM/DRAM region we have been loaded to. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: initialize and setup PMICAndre Przywara
Most boards featuring the Allwinner A64 SoC also use an AXP 803 power management IC (PMIC) to set and switch voltages. Add code to initialize Allwinner's RSB bus, which is used to talk to the PMIC more easily and faster than I2C. Then do the necessary setup, which in our case consists of enabling the DC1SW port, which powers USB and the Ethernet PHY and setting the DCDC1 voltage to 3.3V (instead of the default 3.0V). Also export the PMIC access function to be callable from the PSCI code. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: enter U-Boot in AArch64Andre Przywara
Drop back into non-secure world into the AArch64 state now. This allows U-Boot to run in 64-bit mode, so no need to call back into the firmware to eventually launch 64-bit kernels. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: remove unneeded platform-specific GIC setupAndre Przywara
The Allwinner code defined a platform specific GIC setup. However we don't need secure IRQs or a special setup, so we can easily go with the default ARM GIC setup provided by the driver. Remove the unneeded code file, associated calls and code lines. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: introduce get_highest_el() functionalityAndre Przywara
Add a function to get the highest implemented exception level and use that for entering BL3-3 in. Also we make the bit-size we enter non-secure world a parameter, so that we can easily switch between AArch32 and AArch64. (HACK: Keep entering U-Boot still in AArch32 SVC for now.) Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: remove unneeded sunxi_config_setup()Andre Przywara
This function does nothing, apparently it was copied from the FVP code. Remove its definition and the call. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: MMU setup: remove unneeded EL1 versionAndre Przywara
We have macros to generate define and populate the memory map structures, but in fact need only one instance for EL3, as sunxi does not need EL1 page tables. Remove the unneeded code. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: remove unneeded BL1 and BL2 codeAndre Przywara
The sun50i port only uses BL31, so there is no need for then BL1 and BL2 code files (copied from the FVP port). Remove them. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-06-02sun50i: simplify topology setupAndre Przywara
The topology code was apparently copied from the ARM FVP model, which is very versatile and allows for a sophisticated, configurable topology setup. Allwinner SoC on the other hand are at best multi-cluster - the A64 in fact has only one cluster. Simplify the sunxi specific topology code to support two affinity levels at most - this drastically reduces the code size and makes it much more readable. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-02-16sun50i: remove unused sunxi_gic_initAndre Przywara
2016-02-04Merge in files from Allwinners lichee BSP tarballAndre Przywara
The Pine64 Wiki[1] links to a BSP tarball, among other things containing a dump of an ARM Trusted Firmware source tree with Allwinner changes on top. Since the tarball does not contain any version history information about the changes, this commit is just the diff between the ATF 1.0 release and the files from the Allwinner provided tarball. The executable flag from many source has been removed. [1] http://wiki.pine64.org/index.php/Pine_A64_Software_Release#Linux_BSP_Related