summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--gcc/ChangeLog12
-rw-r--r--gcc/common/config/s390/s390-common.c3
-rw-r--r--gcc/config/s390/s390.c19
-rw-r--r--gcc/output.h2
-rw-r--r--gcc/testsuite/ChangeLog8
-rw-r--r--gcc/testsuite/gcc.target/s390/nodatarel-1.c2
-rw-r--r--gcc/testsuite/gcc.target/s390/section-anchors.c14
-rw-r--r--gcc/testsuite/gcc.target/s390/section-anchors2.c26
-rw-r--r--gcc/testsuite/gcc.target/s390/section-anchors3.c11
-rw-r--r--gcc/varasm.c2
10 files changed, 96 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2f4e96f18a9..2ac32608a45 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+2018-12-03 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * common/config/s390/s390-common.c (s390_option_init_struct):
+ Use section anchors by default.
+ * config/s390/s390.c (s390_check_symref_alignment): Handle
+ anchors.
+ (TARGET_MAX_ANCHOR_OFFSET): Use short displacement.
+ * output.h (assemble_align): Pass `align' as unsigned int, so
+ that the value 0x80000000, which corresponds to `aligned(1 <<
+ 28)', would pass the `align > BITS_PER_UNIT' check.
+ * varasm.c (assemble_align): Likewise.
+
2018-12-03 Julian Brown <julian@codesourcery.com>
* tree-pretty-print.c (dump_omp_clause): Make default case
diff --git a/gcc/common/config/s390/s390-common.c b/gcc/common/config/s390/s390-common.c
index 2f728957e25..59b24654c82 100644
--- a/gcc/common/config/s390/s390-common.c
+++ b/gcc/common/config/s390/s390-common.c
@@ -74,6 +74,9 @@ s390_option_init_struct (struct gcc_options *opts)
/* By default, always emit DWARF-2 unwind info. This allows debugging
without maintaining a stack frame back-chain. */
opts->x_flag_asynchronous_unwind_tables = 1;
+
+ /* Enable section anchors by default. */
+ opts->x_flag_section_anchors = 1;
}
/* Implement TARGET_HANDLE_OPTION. */
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 277d555440b..62868995ca6 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -4187,6 +4187,20 @@ s390_check_symref_alignment (rtx addr, HOST_WIDE_INT alignment)
if (GET_CODE (symref) == SYMBOL_REF)
{
+ /* s390_encode_section_info is not called for anchors, since they don't
+ have corresponding VAR_DECLs. Therefore, we cannot rely on
+ SYMBOL_FLAG_NOTALIGN{2,4,8}_P returning useful information. */
+ if (SYMBOL_REF_ANCHOR_P (symref))
+ {
+ HOST_WIDE_INT block_offset = SYMBOL_REF_BLOCK_OFFSET (symref);
+ unsigned int block_alignment = (SYMBOL_REF_BLOCK (symref)->alignment
+ / BITS_PER_UNIT);
+
+ gcc_assert (block_offset >= 0);
+ return ((block_offset & (alignment - 1)) == 0
+ && block_alignment >= alignment);
+ }
+
/* We have load-relative instructions for 2-byte, 4-byte, and
8-byte alignment so allow only these. */
switch (alignment)
@@ -16338,6 +16352,11 @@ s390_case_values_threshold (void)
#undef TARGET_CASE_VALUES_THRESHOLD
#define TARGET_CASE_VALUES_THRESHOLD s390_case_values_threshold
+/* Use only short displacement, since long displacement is not available for
+ the floating point instructions. */
+#undef TARGET_MAX_ANCHOR_OFFSET
+#define TARGET_MAX_ANCHOR_OFFSET 0xfff
+
struct gcc_target targetm = TARGET_INITIALIZER;
#include "gt-s390.h"
diff --git a/gcc/output.h b/gcc/output.h
index 333389e484c..b2f0cc168eb 100644
--- a/gcc/output.h
+++ b/gcc/output.h
@@ -219,7 +219,7 @@ extern void assemble_external (tree);
extern void assemble_zeros (unsigned HOST_WIDE_INT);
/* Assemble an alignment pseudo op for an ALIGN-bit boundary. */
-extern void assemble_align (int);
+extern void assemble_align (unsigned int);
/* Assemble a string constant with the specified C string as contents. */
extern void assemble_string (const char *, int);
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index f38b209ff07..27300fcc0e0 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2018-12-03 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * gcc.target/s390/nodatarel-1.c: Expect .LANCHOR0@GOTENT instead
+ of a@GOTENT.
+ * gcc.target/s390/section-anchors.c: New test.
+ * gcc.target/s390/section-anchors2.c: New test.
+ * gcc.target/s390/section-anchors3.c: New test.
+
2018-12-03 Richard Biener <rguenther@suse.de>
PR tree-optimization/88301
diff --git a/gcc/testsuite/gcc.target/s390/nodatarel-1.c b/gcc/testsuite/gcc.target/s390/nodatarel-1.c
index 1d589a10947..f53332f901d 100644
--- a/gcc/testsuite/gcc.target/s390/nodatarel-1.c
+++ b/gcc/testsuite/gcc.target/s390/nodatarel-1.c
@@ -29,7 +29,7 @@ bar (int b)
a = b;
}
-/* { dg-final { scan-assembler-times "a@GOTENT" 3 } } */
+/* { dg-final { scan-assembler-times "\\.LANCHOR\\d+@GOTENT" 3 } } */
/* The exrl target is a label_ref which should not be affected at
all. */
diff --git a/gcc/testsuite/gcc.target/s390/section-anchors.c b/gcc/testsuite/gcc.target/s390/section-anchors.c
new file mode 100644
index 00000000000..68a6a393e31
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/section-anchors.c
@@ -0,0 +1,14 @@
+/* Test basic section anchor functionality. */
+
+/* { dg-do compile { target { lp64 } } } */
+/* { dg-options "-O3 -march=z13" } */
+
+int a = 1, b = 2;
+
+void
+f ()
+{
+ a = 1234;
+ b = 5678;
+ /* { dg-final { scan-assembler {(?n)\n\tlarl\t(%r\d+),\.LANCHOR\d+\n\tmvhi\t\d+\(\1\),1234\n\tmvhi\t\d+\(\1\),5678} } } */
+}
diff --git a/gcc/testsuite/gcc.target/s390/section-anchors2.c b/gcc/testsuite/gcc.target/s390/section-anchors2.c
new file mode 100644
index 00000000000..a3c31432d7a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/section-anchors2.c
@@ -0,0 +1,26 @@
+/* Test corner case when LG from literal pool could be preferred to LARL. */
+
+/* { dg-do compile { target { lp64 } } } */
+/* { dg-options "-O3 -march=z13" } */
+
+int e = 42;
+int *c = &e;
+
+void
+h (int *i)
+{
+ c = i;
+}
+
+void
+j ()
+{
+ h (&e);
+ /* { dg-final { scan-assembler {(?n)\n\tlarl\t.+\n\tstgrl\t.+\n\tbr\t%r14\n} } } */
+}
+
+void
+f ()
+{
+ h (c);
+}
diff --git a/gcc/testsuite/gcc.target/s390/section-anchors3.c b/gcc/testsuite/gcc.target/s390/section-anchors3.c
new file mode 100644
index 00000000000..d9cac9d7e57
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/section-anchors3.c
@@ -0,0 +1,11 @@
+/* Test corner case when LG from literal pool could be preferred to LARL. */
+
+/* { dg-do compile { target { lp64 } } } */
+/* { dg-options "-O3 -march=z13" } */
+
+int
+a (int b)
+{
+ return b / 100;
+ /* { dg-final { scan-assembler-not {\n\t\.quad\t\.LC} } } */
+}
diff --git a/gcc/varasm.c b/gcc/varasm.c
index 243d205c1f5..dcce541d643 100644
--- a/gcc/varasm.c
+++ b/gcc/varasm.c
@@ -1974,7 +1974,7 @@ assemble_zeros (unsigned HOST_WIDE_INT size)
/* Assemble an alignment pseudo op for an ALIGN-bit boundary. */
void
-assemble_align (int align)
+assemble_align (unsigned int align)
{
if (align > BITS_PER_UNIT)
{