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-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/lra-assigns.c12
2 files changed, 15 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index bca96c04ac8..3185dd6e50c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2019-01-11 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR rtl-optimization/87305
+ * lra-assigns.c
+ (setup_live_pseudos_and_spill_after_risky_transforms): Add code
+ for little endian pseudos used as paradoxical subreg.
+
2019-01-11 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/88693
diff --git a/gcc/lra-assigns.c b/gcc/lra-assigns.c
index bcd81450c06..8b56b58fb2e 100644
--- a/gcc/lra-assigns.c
+++ b/gcc/lra-assigns.c
@@ -1174,10 +1174,14 @@ setup_live_pseudos_and_spill_after_risky_transforms (bitmap
- hard_regno_nregs (hard_regno, PSEUDO_REGNO_MODE (i)));
enum reg_class rclass = lra_get_allocno_class (i);
- if (WORDS_BIG_ENDIAN
- && (hard_regno - nregs_diff < 0
- || !TEST_HARD_REG_BIT (reg_class_contents[rclass],
- hard_regno - nregs_diff)))
+ if ((WORDS_BIG_ENDIAN
+ && (hard_regno - nregs_diff < 0
+ || !TEST_HARD_REG_BIT (reg_class_contents[rclass],
+ hard_regno - nregs_diff)))
+ || (!WORDS_BIG_ENDIAN
+ && (hard_regno + nregs_diff >= FIRST_PSEUDO_REGISTER
+ || !TEST_HARD_REG_BIT (reg_class_contents[rclass],
+ hard_regno + nregs_diff))))
{
/* Hard registers of paradoxical sub-registers are out of
range of pseudo register class. Spill the pseudo. */