diff options
| author | Michael Meissner <meissner@linux.ibm.com> | 2019-12-17 22:21:35 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2019-12-17 22:21:35 +0000 |
| commit | 54ba911fd1670654d494f238d83e337a4aeb0cb4 (patch) | |
| tree | 60425b46e8b77a06d604a9a9c4a65fa1aa50b936 | |
| parent | ef759fd121558455cd45d15e3bcf5e66279d6251 (diff) | |
Generate PADDI to add large constants if -mcpu=future.
2019-12-12 Michael Meissner <meissner@linux.ibm.com>
* config/rs6000/predicates.md (add_operand): Allow eI constants.
* config/rs6000/rs6000.md (add<mode>3): Add alternative to
generate PADDI for 34-bit constants if -mcpu=future.
From-SVN: r279476
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/rs6000/predicates.md | 3 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 12 |
3 files changed, 14 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f8b3ef22318..634d3f8e4b5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -2,10 +2,13 @@ * config/rs6000/rs6000.c (num_insns_constant_gpr): Return 1 if the constant can be loaded with PLI if -mcpu=future. - * config/rs6000/rs6000.md (movdi_internal64): Add alternative to - use PLI to load up 34-bit constants if -mcpu=future. + * config/rs6000/rs6000.md (add<mode>3): Add alternative to + generate PADDI for 34-bit constants if -mcpu=future. + (movdi_internal64): Add alternative to use PLI to load up 34-bit + constants if -mcpu=future. (movsi_internal1): Add alternative to use PLI to load up 32-bit constants if -mcpu=future. + * config/rs6000/predicates.md (add_operand): Allow eI constants. 2019-12-17 Jakub Jelinek <jakub@redhat.com> diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index 42c41b32305..718ddc45f95 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -839,7 +839,8 @@ (define_predicate "add_operand" (if_then_else (match_code "const_int") (match_test "satisfies_constraint_I (op) - || satisfies_constraint_L (op)") + || satisfies_constraint_L (op) + || satisfies_constraint_eI (op)") (match_operand 0 "gpc_reg_operand"))) ;; Return 1 if the operand is either a non-special register, or 0, or -1. diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 6e12d62e23a..ed85a05826c 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -1761,15 +1761,17 @@ }) (define_insn "*add<mode>3" - [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r,r") - (plus:GPR (match_operand:GPR 1 "gpc_reg_operand" "%r,b,b") - (match_operand:GPR 2 "add_operand" "r,I,L")))] + [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r,r,r") + (plus:GPR (match_operand:GPR 1 "gpc_reg_operand" "%r,b,b,b") + (match_operand:GPR 2 "add_operand" "r,I,L,eI")))] "" "@ add %0,%1,%2 addi %0,%1,%2 - addis %0,%1,%v2" - [(set_attr "type" "add")]) + addis %0,%1,%v2 + addi %0,%1,%2" + [(set_attr "type" "add") + (set_attr "isa" "*,*,*,fut")]) (define_insn "*addsi3_high" [(set (match_operand:SI 0 "gpc_reg_operand" "=b") |