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GPIO0_B7 is routed to TXI of the on-board CAN transceiver. The
line has a pull-down per SoC default.
This means the CAN transceiver transmits a dominant zero
and blocks the CAN bus until Linux boots and reconfigures the pin.
Let's switch to pull-up as soon as we can (i.e. in SPL).
This cuts down the "bus is blocked" time from 10 seconds to < 1 second.
Of course, to this needs CONFIG_SPL_BOARD_INIT, so enable it
the Jaguar defconfig.
Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@cherry.de>
Link: https://lore.kernel.org/u-boot/20250617084253.1756035-1-jakob.unterwurzacher@cherry.de/
Relates-to: JAG-403
Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@cherry.de>
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Haikou carrierboard allows multiple adapter boards to be connected, for
now there exists the following adapter boards compatible with PX30
Ringneck:
- Haikou Video Demo on the Video Connector,
- Haikou LVDS 9904379 on the Video Connector,
So support DT overlays so we can use this mechanism instead of full DTB
containing both the carrierboard and the adapter.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250129-px30-overlay-v1-3-4729b3fcb4c0@cherry.de
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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In order to be able to use Device Tree Overlays, the fdtoverlay_addr_r
needs to be specified.
Follow what's been done for other Rockchip SoCs and leave 1MiB for the
base DTB before the address for the overlay.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250129-px30-overlay-v1-2-4729b3fcb4c0@cherry.de
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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A FIT image which is NOT using -E when created by mkimage - that is with
image data within the FIT - will fail to apply FDTO if the base FDT
image node does not specify a load property (which points to an address
in DRAM). This is because we check that the FDT address we want to apply
overlay to (i.e. modify and likely increase in size) is not inside the
FIT and give up otherwise. This is assumed necessary because we may then
overwrite other data when applying in-place.
However, we can do better than giving up: relocating the FDT in another
place in DRAM where it's safe to increase its size and apply FDTOs.
While at it, do not discriminate anymore on whether the data is within
the FIT data address space - that is FIT images created with mkimage -E
- as that still may be susceptible to unintended data overwrites as
mkimage -E simply concatenates all blobs after the FIT. If the FDT blob
isn't the last, it'll result in overwriting later blobs when resizing.
The side effect is that the load property in the FIT is only
temporarily used to load the FDT but then relocated right before we
start applying overlays.
Suggested-by: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
(cherry picked from commit 881f0b77dc8cfc454fb99ee183717d2538013665)
[add &images->lmb as first argument to boot_relocate_fdt as v2024.07
doesn't have commit ed17a33fed29 ("lmb: make LMB memory map persistent
and global")]
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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If TPL_GPIO and TPL_PINCTRL_ROCKCHIP are enabled and a sysreset-gpio is
provided in the TPL Device Tree, this will trigger a system reset
similar to what's currently been done in SPL whenever the RK3399 "warm"
boots. Because there's currently only one user of sysreset-gpio logic,
and TPL is enabled on that board, so let's migrate the logic and that
board to do it in TPL.
There are three reasons for moving this earlier:
- faster boot time as we don't need to reach SPL to be able to reset the
system on a condition we know is already met in TPL,
- have less code to be impacted by the issue this system reset works
around (that is, "unclean" SoC registers after a reboot),
- less confusion around the reason for restarting. Indeed when done from
SPL, the following log can be observed:
"""
U-Boot TPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 - 15:31:45)
Channel 0: DDR3, 666MHz
BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB
Channel 1: DDR3, 666MHz
BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB
256B stride
Trying to boot from BOOTROM
Returning to boot ROM...
U-Boot SPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 - 15:31:45 +0100)
Trying to boot from MMC2
U-Boot TPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 - 15:31:45)
"""
possibly hinting at an issue within the SPL when loading the fitImage
from MMC2 instead of the normal course of events (a system reset).
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 0a17123dedf827f4ca9b158252279adf03906307)
[SPL to XPL renaming hasn't happened yet in 2024.07, so resolve conflict
by using SPL_BUILD instead of XPL_BUILD]
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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This defines a weak tpl_board_init function that can be used for running
board/SoC-specific code before the DRAM init happens, similarly to
spl_board_init() for SPL.
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 7461d55ca7d1a55d5f90c5d33501a369eabd4277)
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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To prepare to support forcing power on reset from TPL which would have
the exact same logic, just in an earlier stage, let's merge the CRU
check that triggers the power on reset with the rest of the logic.
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit b21fd44c84fd5053a350de6138fb832839c04b67)
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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A later commit will make use of the pinctrl driver in TPL so let's add
the ability to build the Rockchip pinctrl driver in TPL.
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 5bc65f5cab2369e0053d19df356b4bcb31150409)
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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Rather than repeating the same code in two files (SPL and TPL), move it
to a shared filed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
(cherry picked from commit 001b3109da15b0f33fdbcdcfc2e8fada393609dc)
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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Linux
RK3399 Puma has support for driving multiple displays at the same time,
the most notable scenario being HDMI+DSI since there exists a devkit
with both DSI display and HDMI output.
While HDMI seems to work fine in U-Boot, as the U-Boot logo is shown
whenever the EFI bootmeth is used, it messes up DSI in HDMI+DSI setup in
the Linux kernel. There are some ways to work around this bug but no
known appropriate fix for now, so let's rather not trigger this bug.
Since there isn't any client of ours that seems to be using this
feature, let's disable it for now. Users can re-enable this feature in
the event they have HDMI-only products.
Link: https://lore.kernel.org/r/20240729-puma-no-video-v1-1-3b92072642a4@cherry.de
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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This enables PCIe support on Tiger as exposed on
Q7_PCIE[0123]_[RT]X_[PN] signals and more specifically on the `PCI
Express` connector on the Haikou devkit.
This was tested with a PCIe to NVMe adapter (e.g.
https://www.amazon.de/dp/B07RZZ3TJG).
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Relates-to: TIGR-184
Link: https://lore.kernel.org/r/20240704-tsd-rk3588-nvme-v1-3-fb9e8dde9570@cherry.de
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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Jaguar has an M.2 M-KEY slot for NVMes, connected to the PCIe3 4-lane
PHY on RK3588.
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y is technically not necessary since
it's required only for the M.2 E-KEY slot on the main PCB, but that is
used typically for WiFi+BT modules, or on the mezzanine connector but
the features exposed behind that connector aren't supported in U-Boot
(no DT for it right now). However, if the PHY driver is missing, we get
the following error message:
pcie_dw_rockchip pcie@fe170000: failed to get pcie phy (ret=-19)
and you would need to know which PCIe controller that is before deciding
to ignore it. While after enabling the PHY driver, we are greeted with:
pcie_dw_rockchip pcie@fe170000: PCIe-2 Link Fail
which is a bit more acceptable (to me).
The other option would be to disable the PCIe2 PHYs/controllers in the
DT, which I'm not too fond of.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Relates-to: TIGR-184
Link: https://lore.kernel.org/r/20240704-tsd-rk3588-nvme-v1-2-fb9e8dde9570@cherry.de
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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The Jaguar SBC provides an M.2 slot connected to the pcie3 controller.
In contrast to a number of other boards the pcie-refclk is gpio-controlled,
so the necessary clock and is added to the list of pcie3 clocks.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240423074956.2622318-1-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 0ec7e1096332bc2b9bc881c21cfd234058f747b3 ]
(cherry picked from commit 76a89655ae740dddb57187b5b52071ed99187452)
Relates-to: TIGR-184
Link: https://lore.kernel.org/r/20240704-tsd-rk3588-nvme-v1-1-fb9e8dde9570@cherry.de
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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On Puma v2.1 with a KSZ9031, the Ethernet PHY often doesn't detect the
link in the 4-second default timeout.
After some boot-loop test for about a thousand boots, 70% were below
10s, 90% below 15s and 100% below 30s. Let's play it safe and make it
30s so that hopefully all links that should be detected are.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Relates-to: TIGR-184
Link: https://lore.kernel.org/r/20240619-puma-eth-timeout-v2-1-a01c443d4445@cherry.de
[PHY_ANEG_TIMEOUT migration to a Kconfig symbol happened after v2024.07
use a constant in include/configs/ instead]
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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Commit 2ce40542e0eb ("power: rk8xx: properly print all supported PMICs
name") fixed all PMICs name that were broken but broke the only one that
was not broken already: RK808. This one is a special case because the ID
registers are marked as reserved and always return 0, so the variant
cannot be derived the same way it is done for other PMICs from Rockchip.
Fixes: 2ce40542e0eb ("power: rk8xx: properly print all supported PMICs name")
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Relates-to: TIGR-184
Link: https://lore.kernel.org/r/20240617-rk808-show-variant-v1-1-62143a89bafb@cherry.de
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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In commit 100f489f58a6 ("rockchip: rk3399: Fix loading FIT from SD-card
when booting from eMMC"), the spi1 bootph properties were mistakenly
removed meaning, so re-add them back to fix SPI-NOR flash not being
found in U-Boot pre-reloc as required for RK3399 Puma.
Fixes: 100f489f58a6 ("rockchip: rk3399: Fix loading FIT from SD-card when booting from eMMC")
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Relates-to: TIGR-184
Link: https://lore.kernel.org/r/20240617-rk3399-fix-v1-1-69af21c2baed@cherry.de
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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The Haikou Devkit exposes 4 buttons over GPIO so let's enable their
support so their status can be queried from the `button` command from
the CLI.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Relates-to: TIGR-184
Link: https://lore.kernel.org/r/20240614-ringneck-no-gadget-v1-4-d3bc6e5088de@cherry.de
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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PX30 supports ARMv8 Cryptography Extensions so let's enable it by
default for all PX30 to make FIT verification when enabled much faster.
While A35 shouldn't be impacted by ARMV8_SET_SMPEN cache coherency
according to the Kconfig help text, let's enable it just in case since
it exists in the documentation[1].
For u-boot part of the FIT image, it is now taking 5ms against currently
35ms. fdt-1 check lowered from 3ms to <1ms. atf-1 from 6ms to <1ms.
[1] https://developer.arm.com/documentation/100236/0100/register-descriptions/aarch64-system-registers/cpu-extended-control-register--el1?lang=en
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Relates-to: TIGR-184
Link: https://lore.kernel.org/r/20240614-ringneck-no-gadget-v1-3-d3bc6e5088de@cherry.de
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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This enables FIT verification in SPL for its payload (bl31, u-boot.itb,
...). This makes PX30 Ringneck match what happens on other Theobroma
boards.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Relates-to: TIGR-184
Link: https://lore.kernel.org/r/20240614-ringneck-no-gadget-v1-2-d3bc6e5088de@cherry.de
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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USB gadget simply doesn't work right now on PX30. Tested on PX30 EVB and
PX30 Ringneck with Linux mainline and Rockchip 5.10 Linux as well as
U-Boot.
We don't want to our users to assume that USB gadget is supported on Q7
USB P1 on Ringneck Haikou, so let's remove its support, which also
removes the ums CLI command, fastboot and Android image booting
support.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Relates-to: TIGR-184
Link: https://lore.kernel.org/r/20240614-ringneck-no-gadget-v1-1-d3bc6e5088de@cherry.de
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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It should read "in SPL" and not "wuth SPL".
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Relates-to: TIGR-184
Link: https://lore.kernel.org/r/20240611-misc-20240610-v2-4-028e82b0b620@cherry.de
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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Prior to that, seeing the debug() messages required to enable DM_DEBUG
which defines DEBUG (and then _DEBUG) which in turn makes failing
assert() calls reset U-Boot which isn't necessarily what is desired.
Instead, let's migrate to dm_warn which is using log_debug when unset or
log_warn when set.
While at it, reword the DM_DEBUG symbol in Kconfig to explain what it
now actually does.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Relates-to: TIGR-184
Link: https://lore.kernel.org/r/20240611-misc-20240610-v2-3-028e82b0b620@cherry.de
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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outp always point to an unsigned type in ofnode_read_u* functions but
the format specifier is currently always using signed type.
This is an issue since the signed type can only contain half of the
unsigned type values above 0.
However, this now breaks another usecase. Indeed,
ofnode_read_s32_default is actually passing an s32 but it'll be printed
as a u32 instead. But since the function is called u32, it makes more
sense to have it print an unsigned value.
This was discovered because arm,smc-id = <0x82000010>; on RK3588S is
above the max signed value and therefore would return a negative signed
decimal value instead of its proper unsigned one.
Fixes: fa12dfa08a7b ("dm: core: support reading a single indexed u64 value")
Fixes: 4bb7075c830c ("dm: core: support reading a single indexed u32 value")
Fixes: 7e5196c409f1 ("dm: core: Add ofnode function to read a 64-bit int")
Fixes: 9e51204527dc ("dm: core: Add operations on device tree references")
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Relates-to: TIGR-184
Link: https://lore.kernel.org/r/20240611-misc-20240610-v2-2-028e82b0b620@cherry.de
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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A driver can have multiple compatible. When the id->compatible matches
for that driver, the first compatible supported by the driver is
currently returned, which gives the following confusing message:
- found match at 'rk3588_syscon': 'rockchip,rk3588-sys-grf' matches 'rockchip,rk3588-pmugrf'
Considering that the compatible passed in argument is necessarily the
one that exactly matched to enter this code path, there's no need to do
some elaborate logic, just print the driver name and the compatible
passed in argument.
Fixes: d3e773613b6d ("dm: core: Use U-Boot logging instead of pr_debug()")
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Relates-to: TIGR-184
Link: https://lore.kernel.org/r/20240611-misc-20240610-v2-1-028e82b0b620@cherry.de
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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The property isn't useful in VPL/SPL/TPL as it is only for U-Boot proper
pre-reloc, which has its own DTB.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 4721d1cb8e45795c10fad252fdfc4951fefaeff2)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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The global bootmeths don't set the dev in bootflow struct which means
the dev_get_parent(bflow->dev) triggers a NULL-pointer dereference and
crash U-Boot.
So before trying to handle a bootflow, check that the associated
bootmeth isn't global, otherwise skip it.
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 05b9665f095f2f70bf8de7ea6d1f5efc2ce7fb35)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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This fixes a few syntactic issues as well as typos and grammar.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 817316663626548f8e5b4d3019e4da957dcf2b59)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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This fixes a handful of typos in various help texts in Kconfig configs.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit b88950fe04b049cd6c544da38d339a780da40141)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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It's bootmeths and not bootmethds.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 20a038317b5beb6dd2322740ab0f469a51e7820d)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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If SYSINFO support isn't enabled, it's a given that uclass_first_device
for UCLASS_SYSINFO will not find anything, therefore let's skip the test
entirely.
This allows to get rid of the following debug message that may be
confusing:
Cannot find uclass for id 118: please add the UCLASS_DRIVER() declaration for this UCLASS_... id
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 512ed81e567e3dba05d92ce34e9fe2c4fb107373)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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Disable support for unused OSes as Linux is the primary target.
Disable support for bootz as zImage isn't a format compatible with
Aarch64 machines so it should never be attempted to be booted.
Enable a bunch of commands:
- erofs
- gpio
- squashfs
that could be useful and are also found in Jaguar and Tiger defconfigs.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit ae4aaa44977cbe522e9f38f2ac2ac07a784bf867)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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RK3588 Jaguar and Tiger, and RK3399 Puma use standard boot with the full
feature set, so let's do that as well for PX30 Ringneck.
Disable support for unused OSes as Linux is the primary target.
Enable a bunch of commands:
- boot/bootd
- erofs
- gpio
- iminfo
- imxtract
- itest
- pmic
- regulator
- sleep
- squashfs
that could be useful and are also found in Jaguar and Tiger defconfigs.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 702e29d9e00dcef46b90b26a6d04771b4cec686e)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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The RK3588-Q7 SoM is a Qseven-compatible (70mm x 70mm, MXM-230
connector) system-on-module from Theobroma Systems, featuring the
Rockchip RK3588.
It provides the following feature set:
* up to 16GB LPDDR4x
* on-module eMMC
* SD card (on a baseboard) via edge connector
* Gigabit Ethernet with on-module GbE PHY
* HDMI/eDP
* MIPI-DSI
* 4x MIPI-CSI (3x on FPC connectors, 1x over Q7)
* HDMI input over FPC connector
* CAN
* USB
- 1x USB 3.0 dual-role (direct connection)
- 2x USB 3.0 host + 1x USB 2.0 host
* PCIe
- 1x PCIe 2.1 Gen3, 4 lanes
- 2xSATA / 2x PCIe 2.1 Gen1, 2 lanes
* on-module ATtiny816 companion controller, implementing:
- low-power RTC functionality (ISL1208 emulation)
- fan controller (AMC6821 emulation)
* on-module Secure Element with Global Platform 2.2.1 compliant
JavaCard environment
The support is added for Tiger on Haikou devkit, similarly to RK3399
Puma and PX30 Ringneck.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit f0d356610b0854f19f62599024fbeb6fb34c4d57)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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Apart from the host-only usb3 controller (host2) the rk3588 also provides
two dual-role controllers. On the Tiger-Haikou combination these are
connected to the lower usb3-host port in host-only mode and the micro-usb3
port for dual-role operation.
Add the necessary controllers, phys to the Tiger-Haikou board and enable
the usb-id extcon.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240422163951.2604273-4-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: d7b83921d098bd76623381f75f5cd2296f1315cc ]
(cherry picked from commit 193d3b2a0a98f2dcd8c43bcbf8a766098a9fa75d)
(cherry picked from commit b467cb0ec9197072a3628687a9a5095dfd3bff86)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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The Q7 standard specifies a usb-id pin on the connector to distiuish
between host and device mode. Model this via the usb-id extcon binding.
While the pin is part of the Q7 standard, so part of the module, the
extcon stays disabled in the som dtsi and will only be enabled in a
baseboard using it.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240422163951.2604273-3-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: eabb53f5dacfd643b5255f35bad30b8f914decdc ]
(cherry picked from commit 4843cec4092318ef7feb0999b0d34ef817465b33)
(cherry picked from commit d00d80e6dd02138ed2e299925c8bd064513a6d3d)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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The comment for the host2_xhci points to the wrong port on the board.
The upper usb3 port is the correct one, so fix the comment to prevent
confusion.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240422163951.2604273-2-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 3482efee1144262dc839792103e6a9e29defecbc ]
(cherry picked from commit 56f3031edf22d163f10bc4b631d37a9aaa82d4d4)
(cherry picked from commit 34c0f6d223afc2bb835d6e77f9f83daf3c0db644)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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The clock-generator of course only produces a 100MHz clock rate,
not 1GHz.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240423114635.2637310-1-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 0eb2a93518fb4728bd1d55fcd3b57fce4797ef1d ]
(cherry picked from commit b574cbafae976cf508692088944e45c9764c0048)
(cherry picked from commit 192e8d66e3b0c55fdade64ca8ee961945bd5d8b0)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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gpio_pwrctrl2 gets duplicated by both rk806_dvs1_null and rk806_dvs2_null
gpio_pwrctrl1 is unset. This typo appears in multiple files. Let's fix them.
Note: I haven't had the chance to test them all because I don't own all
of these boards (obviously). Please test if it's needed.
Signed-off-by: Jing Luo <jing@jing.rocks>
Link: https://lore.kernel.org/r/20240420130355.639406-1-jing@jing.rocks
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: d7f2039e5321636069baa77ef2f1e5d22cb69a88 ]
(cherry picked from commit cb2b6d1d19ed10fcaec5f5859c08a3355d1c66e0)
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 5d12fcf03395527b38d264c3c5bf8b4f77f77ec3)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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The association of uart2 to the q7-uart pins is part of the module
itself and not the baseboard used. Therefore move the pinctrl over
to the tiger dtsi.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240422143356.2596414-1-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 5adbad5c464a708a87cf5ade1bfe2ca947bb2f82 ]
(cherry picked from commit f8314a4fbc00a3d651a7e9b4d9462d10c6c02a12)
(cherry picked from commit d09cd18aedd9fb2abcb6f3003375f680e28ae104)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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Enable the mali gpu node and add the som-specific supply-regulator.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240327112120.1181570-2-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: f5256f8ed4b729c3ab9d9cd7d406313773484b59 ]
(cherry picked from commit 27350b241eafea37dc94743cd9c5dd83295faca9)
(cherry picked from commit a764eb156a06fd8ab073bdaa86df41b4ed3c5209)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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Ringneck was mistakenly set to allow up to 128KiB for the TPL code size
while PX30 SoC only has 16KiB of SRAM.
Therefore, let's use the default value of TPL_MAX_SIZE from the SoC
(which is 10KiB) so that the max code size is actually checked and
useful.
Fixes: c925be73a0a8 ("rockchip: add support for PX30 Ringneck SoM on Haikou Devkit")
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
(cherry picked from commit 724d3c686c57b3ce50a39dceb3f3f1ebc9d3e32c)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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The ID of the PMIC is stored in the 2 16b registers but the only part
that matters right now is the 3 MSB, which make the 3 digits (in hex) of
the part number.
Right now, only RK808 was properly displayed, with this all currently
supported PMICs should display the proper part number.
Additionally, when the PMIC variant is not found, print that value
instead of the masked unshifted value as all PMICs we support for now
have their LSB ignored to represent the actual part number.
Tested on RK806 (RK3588 Jaguar), RK808 (RK3399 Puma) and RK809 (PX30
Ringneck).
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
(cherry picked from commit 2ce40542e0ebc9b782954ae6df3a23885ff60cf1)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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On px30-ringneck the FIT payload is located at sector 0x200 compared to
the more Rockchip common sector 0x4000 offset:
SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
Because FIT payload is located at sector 0x200 and the TPL+SPL is
located at sector 64, the combined size of TPL+SPL cannot take up more
than 224KiB:
(0x200 - 64) x 512 = 0x38000 (224 KiB)
Adjust SPL_PAD_TO to match the used 0x200 sector offset.
While at it, update the px30-ringneck-u-boot.dtsi to remove the now
unnecessary override of simple-bin:fit:offset since SPL_PAD_TO matches
with the current formula.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
(cherry picked from commit aefdec52771694dcaac8bcc6f9772c0b375fc1bd)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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override
Since commit 6007b69d544e ("rockchip: rk3399-puma: Update SPL_PAD_TO
Kconfig option"), SPL_PAD_TO matches
(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) * 512 and the default
value for simple-bin:fit:offset in rockchip-u-boot.dtsi is
SPL_PAD_TO, so let's remove this override.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
(cherry picked from commit b58e0d304b1896f70ab1ba66a2162d0df9deef6b)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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CONFIG_ENV_OFFSET already defaults to 0x3F8000, however it is stored in
lowercase hexdigits instead of uppercase like in the defconfig.
No change in behavior intended.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
(cherry picked from commit eeaa46a70e18d1afb27dbf096c2536294d2d0a4d)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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The default env size is 0x8000 when building for Rockchip SoCs with
support for environment stored in MMC.
Jaguar hasn't entered mass production just yet, so it's a breaking
change we can afford in the name of consistency.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
(cherry picked from commit 67f87e215c9332d222212da4843cc5a3c0e744cb)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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ArmSoM Sige7 is a Rockchip RK3588 based SBC (Single Board Computer) by
ArmSoM.
There are two variants depending on the DRAM size : 8G and 16G.
Specification:
Rockchip Rk3588 SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
8/16GB memory LPDDR4x
Mali G610MC4 GPU
2x MIPI CSI 2 multiple lanes connector
64GB/128GB on board eMMC
uSD slot
1x USB 2.0 Type-A, 1x USB 3.0 Type-A, 1x USB 3.0 Type-C
1x HDMI 2.1 output
2x 2.5 Gbps Ethernet port
40-pin IO header including UART, SPI and I2C
USB PD over USB Type-C
Size: 92mm x 62mm
Kernel commit:
81c828a67c78 (arm64: dts: rockchip: Add ArmSom Sige7 board)
Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 40b573e4f6ed629eab54633f8836a2be5e5aa75a)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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After we sync USB3 DRD nodes from v6.10-rc1, these obsolete nodes
can be removed.
Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 7a53abb18325979f8efb8ef3daf76951bc807a22)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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Specification:
Rockchip Rk3588 SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
8/16/32GB Memory LPDDR4/LPDDR4x
Mali G610MP4 GPU
2× MIPI-CSI Connector
1× MIPI-DSI Connector
1x M.2 Key M (PCIe 3.0 4-lanes)
2x RTL8125 2.5G Ethernet
Onboard AP6275P for WIFI6/BT5
32GB/64GB/128GB eMMC
MicroSD card slot
1x USB2.0, 1x USB3.0 Type-A, 1x US3.0 Type-C
1x HDMI Output, 1x type-C DP Output
Functions work normally:
USB2.0 Host
USB3.0 Type-A Host
M.2 Key M (PCIe 3.0 4-lanes)
2x RTL8125 2.5G Ethernet
eMMC
MicroSD card
More information can be obtained from the following website
https://docs.armsom.org/armsom-sige7
Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Reviewed-by: Weizhao Ouyang <weizhao.ouyang@arm.com>
Link: https://lore.kernel.org/r/20240420034300.176920-4-liujianfeng1994@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 81c828a67c78bb03ea75819c417c93c7f3d637b5 ]
(cherry picked from commit d427a11542bcf5364a5260280e077f0a2e030dcb)
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 809b5167dfaba1771df061d4f0df5539d339fe0b)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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The mmu600_pcie is connected with the five PCIe controllers.
The mmu600_php is connected with the USB3 controller, the GMAC
controllers, and the SATA controllers.
See 8.2 Block Diagram, in rk3588 TRM (Technical Reference Manual).
The IOMMUs are disabled by default, as further patches are needed to
program the SID/SSIDs in to the IOMMUs.
iommu: Default domain type: Translated
iommu: DMA domain TLB invalidation policy: strict mode
arm-smmu-v3 fc900000.iommu: ias 48-bit, oas 48-bit (features 0x001c1eaf)
arm-smmu-v3 fc900000.iommu: allocated 65536 entries for cmdq
arm-smmu-v3 fc900000.iommu: allocated 32768 entries for evtq
arm-smmu-v3 fc900000.iommu: msi_domain absent - falling back to wired irqs
Additionally, the IOMMU correctly triggers an IOMMU fault when
a PCIe device performs a write (since the device hasn't been
assigned a SID/SSID):
arm-smmu-v3 fc900000.iommu: event 0x02 received:
arm-smmu-v3 fc900000.iommu: 0x0000010000000002
arm-smmu-v3 fc900000.iommu: 0x0000000000000000
arm-smmu-v3 fc900000.iommu: 0x0000000000000000
arm-smmu-v3 fc900000.iommu: 0x0000000000000000
While this doesn't provide much value as is, having the devices as
disabled in the device tree will allow developers to see that the rk3588
actually has IOMMUs on the SoC.
Signed-off-by: Niklas Cassel <cassel@kernel.org>
Link: https://lore.kernel.org/r/20240502140231.477049-2-cassel@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: cd81d3a0695cc54ad6ac0ef4bbb67a7c8f55d592 ]
(cherry picked from commit ea9a34aa0d786cbf4b87f1ba528e69b07219738f)
Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 95967c4a7469c24f48d4f9c887ee979c0b5547e7)
Relates-to: TIGR-184
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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