diff options
| author | Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> | 2022-10-19 16:40:58 +0200 |
|---|---|---|
| committer | Quentin Schulz <quentin.schulz@theobroma-systems.com> | 2022-10-19 16:40:58 +0200 |
| commit | 57156aef3ee7bbc7785dd5ae148c80b5c16c5e69 (patch) | |
| tree | 0c1cd1a041b3e0bcc136b15e6a450a3a6a84e2d2 /post | |
| parent | afd158b8302be430728f73c21c2e4eb59dfb3a02 (diff) | |
TSD: arm64: dts: rockchip: lower rk3399-puma-haikou SD controller clock frequency
CRC errors (code -84 EILSEQ) have been observed for some SanDisk
Ultra A1 cards when running at 50MHz.
Waveform analysis suggest that the level shifters that are used on the
RK3399-Q7 module for voltage translation between 3.0 and 3.3V don't
handle clock rates at or above 48MHz properly. Back off to 40MHz for
some safety margin.
[TSD] Sent to Linux kernel first (see link), will be synced by upstream
U-Boot once merged.
Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/lkml/20221019-upstream-puma-sd-40mhz-v1-0-754a76421518@theobroma-systems.com/
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Diffstat (limited to 'post')
0 files changed, 0 insertions, 0 deletions