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-rw-r--r--core/arch/arm/plat-ti/api_monitor_index_a9.h50
-rw-r--r--core/arch/arm/plat-ti/conf.mk2
-rw-r--r--core/arch/arm/plat-ti/sm_platform_handler_a9.c74
-rw-r--r--core/arch/arm/plat-ti/sub.mk1
-rw-r--r--scripts/checkpatch_inc.sh2
5 files changed, 127 insertions, 2 deletions
diff --git a/core/arch/arm/plat-ti/api_monitor_index_a9.h b/core/arch/arm/plat-ti/api_monitor_index_a9.h
new file mode 100644
index 00000000..5c9f3418
--- /dev/null
+++ b/core/arch/arm/plat-ti/api_monitor_index_a9.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2017, Texas Instruments
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES// LOSS OF USE, DATA, OR PROFITS// OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef API_MONITOR_INDEX_H
+#define API_MONITOR_INDEX_H
+
+#define API_HAL_RET_VALUE_OK 0x00000000
+#define API_HAL_RET_VALUE_SERVICE_UNKNWON 0xFFFFFFFF
+
+/* Base Index of APIs */
+#define API_MONITOR_BASE_INDEX 0x00000100
+
+/* Set the Debug control register */
+#define API_MONITOR_L2CACHE_SETDEBUG_INDEX (API_MONITOR_BASE_INDEX + 0x00000000)
+/* Clean and invalidate physical address range */
+#define API_MONITOR_L2CACHE_CLEANINVBYPA_INDEX (API_MONITOR_BASE_INDEX + 0x00000001)
+/* Enables/Disables the PL310 Cache */
+#define API_MONITOR_L2CACHE_SETCONTROL_INDEX (API_MONITOR_BASE_INDEX + 0x00000002)
+/* Set the Auxiliary Control Register */
+#define API_MONITOR_L2CACHE_SETAUXILIARYCONTROL_INDEX (API_MONITOR_BASE_INDEX + 0x00000009)
+/* Set the Data and Tag RAM Latency */
+#define API_MONITOR_L2CACHE_SETLATENCY_INDEX (API_MONITOR_BASE_INDEX + 0x00000012)
+/* Set the Pre-fetch Control Register */
+#define API_MONITOR_L2CACHE_SETPREFETCHCONTROL_INDEX (API_MONITOR_BASE_INDEX + 0x00000013)
+
+#endif /* API_MONITOR_INDEX_H */
diff --git a/core/arch/arm/plat-ti/conf.mk b/core/arch/arm/plat-ti/conf.mk
index c69d36e2..1d704a23 100644
--- a/core/arch/arm/plat-ti/conf.mk
+++ b/core/arch/arm/plat-ti/conf.mk
@@ -15,11 +15,11 @@ $(call force,CFG_PL310_LOCKED,y)
$(call force,CFG_SECURE_TIME_SOURCE_REE,y)
arm32-platform-cpuarch := cortex-a9
else
-$(call force,CFG_SM_PLATFORM_HANDLER,y)
$(call force,CFG_HWSUPP_MEM_PERM_PXN,y)
$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
arm32-platform-cpuarch := cortex-a15
endif
+$(call force,CFG_SM_PLATFORM_HANDLER,y)
$(call force,CFG_GIC,y)
ifneq ($(CFG_WITH_SOFTWARE_PRNG),y)
$(call force,CFG_DRA7_RNG,y)
diff --git a/core/arch/arm/plat-ti/sm_platform_handler_a9.c b/core/arch/arm/plat-ti/sm_platform_handler_a9.c
new file mode 100644
index 00000000..dfe245fa
--- /dev/null
+++ b/core/arch/arm/plat-ti/sm_platform_handler_a9.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2017, Texas Instruments
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES// LOSS OF USE, DATA, OR PROFITS// OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <arm32.h>
+#include <io.h>
+#include <kernel/tz_ssvce_def.h>
+#include <kernel/tz_ssvce_pl310.h>
+#include <platform_config.h>
+#include <sm/sm.h>
+#include "api_monitor_index_a9.h"
+
+bool sm_platform_handler(struct sm_ctx *ctx)
+{
+ if (ctx->nsec.r12 == 0x200)
+ return true;
+
+ switch (ctx->nsec.r12) {
+ case API_MONITOR_L2CACHE_SETDEBUG_INDEX:
+ write32(ctx->nsec.r0, pl310_base() + PL310_DEBUG_CTRL);
+ ctx->nsec.r0 = API_HAL_RET_VALUE_OK;
+ break;
+ case API_MONITOR_L2CACHE_CLEANINVBYPA_INDEX:
+ arm_cl2_cleaninvbypa(pl310_base(), ctx->nsec.r0,
+ (ctx->nsec.r0 + ctx->nsec.r1));
+ ctx->nsec.r0 = API_HAL_RET_VALUE_OK;
+ break;
+ case API_MONITOR_L2CACHE_SETCONTROL_INDEX:
+ write32(ctx->nsec.r0, pl310_base() + PL310_CTRL);
+ ctx->nsec.r0 = API_HAL_RET_VALUE_OK;
+ break;
+ case API_MONITOR_L2CACHE_SETAUXILIARYCONTROL_INDEX:
+ write32(ctx->nsec.r0, pl310_base() + PL310_AUX_CTRL);
+ ctx->nsec.r0 = API_HAL_RET_VALUE_OK;
+ break;
+ case API_MONITOR_L2CACHE_SETLATENCY_INDEX:
+ write32(ctx->nsec.r0, pl310_base() + PL310_TAG_RAM_CTRL);
+ write32(ctx->nsec.r1, pl310_base() + PL310_DATA_RAM_CTRL);
+ ctx->nsec.r0 = API_HAL_RET_VALUE_OK;
+ break;
+ case API_MONITOR_L2CACHE_SETPREFETCHCONTROL_INDEX:
+ write32(ctx->nsec.r0, pl310_base() + PL310_PREFETCH_CTRL);
+ ctx->nsec.r0 = API_HAL_RET_VALUE_OK;
+ break;
+ default:
+ ctx->nsec.r0 = API_HAL_RET_VALUE_SERVICE_UNKNWON;
+ break;
+ }
+
+ return false;
+}
diff --git a/core/arch/arm/plat-ti/sub.mk b/core/arch/arm/plat-ti/sub.mk
index e663a684..c45e2406 100644
--- a/core/arch/arm/plat-ti/sub.mk
+++ b/core/arch/arm/plat-ti/sub.mk
@@ -3,3 +3,4 @@ srcs-y += main.c
srcs-$(CFG_PL310) += ti_pl310.c
srcs-$(PLATFORM_FLAVOR_dra7xx) += sm_platform_handler_a15.c
srcs-$(PLATFORM_FLAVOR_am57xx) += sm_platform_handler_a15.c
+srcs-$(PLATFORM_FLAVOR_am43xx) += sm_platform_handler_a9.c
diff --git a/scripts/checkpatch_inc.sh b/scripts/checkpatch_inc.sh
index b65c0d20..c394b05b 100644
--- a/scripts/checkpatch_inc.sh
+++ b/scripts/checkpatch_inc.sh
@@ -3,7 +3,7 @@
CHECKPATCH="${CHECKPATCH:-checkpatch.pl}"
# checkpatch.pl will ignore the following paths
CHECKPATCH_IGNORE=$(echo core/lib/lib{fdt,tomcrypt} lib/lib{png,utils,zlib} \
- core/arch/arm/plat-ti/api_monitor_index_a15.h)
+ core/arch/arm/plat-ti/api_monitor_index_a{9,15}.h)
_CP_EXCL=$(for p in $CHECKPATCH_IGNORE; do echo ":(exclude)$p" ; done)
function _checkpatch() {
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-04 12:38:00 +0000