diff options
| -rw-r--r-- | core/arch/arm/plat-vexpress/conf.mk | 2 | ||||
| -rw-r--r-- | core/arch/arm/plat-vexpress/platform_config.h | 26 |
2 files changed, 15 insertions, 13 deletions
diff --git a/core/arch/arm/plat-vexpress/conf.mk b/core/arch/arm/plat-vexpress/conf.mk index f4037d57..5d7d8c1a 100644 --- a/core/arch/arm/plat-vexpress/conf.mk +++ b/core/arch/arm/plat-vexpress/conf.mk @@ -61,7 +61,7 @@ ifeq ($(CFG_CORE_SANITIZE_KADDRESS),y) # This is unfortunately currently not possible to do in make so we have to # calculate it offline, there's some asserts in # core/arch/arm/kernel/generic_boot.c to check that we got it right -CFG_ASAN_SHADOW_OFFSET=0x6e4038e0 +CFG_ASAN_SHADOW_OFFSET=0xc4e38e0 endif $(call force,CFG_DT,y) # SE API is only supported by QEMU Virt platform diff --git a/core/arch/arm/plat-vexpress/platform_config.h b/core/arch/arm/plat-vexpress/platform_config.h index fd61cd15..1e9a0141 100644 --- a/core/arch/arm/plat-vexpress/platform_config.h +++ b/core/arch/arm/plat-vexpress/platform_config.h @@ -28,6 +28,8 @@ #ifndef PLATFORM_CONFIG_H #define PLATFORM_CONFIG_H +#include <stdint.h> + /* Make stacks aligned to data cache line length */ #define STACK_ALIGNMENT 64 @@ -179,29 +181,29 @@ * QEMU virt specifics. */ -#define DRAM0_BASE 0x40000000 -#define DRAM0_SIZE (0x40000000 - DRAM0_TEERES_SIZE) +#define DRAM0_BASE UINTPTR_C(0x40000000) +#define DRAM0_SIZE (UINTPTR_C(0x42100000) - CFG_SHMEM_SIZE) #define DRAM0_TEERES_BASE (DRAM0_BASE + DRAM0_SIZE) -#define DRAM0_TEERES_SIZE (33 * 1024 * 1024) +#define DRAM0_TEERES_SIZE CFG_SHMEM_SIZE #ifdef CFG_WITH_PAGER /* Emulated SRAM */ -#define TZSRAM_BASE DRAM0_TEERES_BASE +#define TZSRAM_BASE 0x0e000000 #define TZSRAM_SIZE CFG_CORE_TZSRAM_EMUL_SIZE -#define TZDRAM_BASE (DRAM0_TEERES_BASE + CFG_TEE_RAM_VA_SIZE) -#define TZDRAM_SIZE (DRAM0_TEERES_SIZE - CFG_TEE_RAM_VA_SIZE \ - - CFG_SHMEM_SIZE) +#define TZDRAM_BASE (TZSRAM_BASE + TZSRAM_SIZE) +#define TZDRAM_SIZE (0x01000000 - TZSRAM_SIZE) #else /* CFG_WITH_PAGER */ -#define TZDRAM_BASE DRAM0_TEERES_BASE -#define TZDRAM_SIZE (DRAM0_TEERES_SIZE - CFG_SHMEM_SIZE) +#define TZDRAM_BASE 0x0e000000 +#define TZDRAM_SIZE 0x01000000 #endif /* CFG_WITH_PAGER */ + #define CFG_TEE_CORE_NB_CORE 2 #define CFG_SHMEM_START (DRAM0_TEERES_BASE + \ @@ -218,11 +220,11 @@ #error "Pager not supported for platform vexpress-qemu_armv8a" #endif -#define DRAM0_BASE 0x40000000 -#define DRAM0_SIZE (0x40000000 - DRAM0_TEERES_SIZE) +#define DRAM0_BASE UINTPTR_C(0x40000000) +#define DRAM0_SIZE (UINTPTR_C(0x42100000) - CFG_SHMEM_SIZE) #define DRAM0_TEERES_BASE (DRAM0_BASE + DRAM0_SIZE) -#define DRAM0_TEERES_SIZE (33 * 1024 * 1024) +#define DRAM0_TEERES_SIZE CFG_SHMEM_SIZE #define TZDRAM_BASE 0x0e100000 #define TZDRAM_SIZE 0x00f00000 |