core: remove __early_bss

Initialize the .bss section early from assembler before entering C
code. As a result, the __early_bss qualifier is not needed anymore.
Remove it, as well as the related symbols (__early_bss_start and
__early_bss_end).

This makes the code simpler hence easier to maintain, at the expense
of initialization time, since .bss is cleared before CPU caches are
turned on (and doing it later would mean some C function have been
called already). Here are some performance numbers measured on HiKey.
The "memset" column measures the time it takes to clear .bss in C,
without this patch. The "assembly" column reports the time taken by the
clear_bss loop in this patch. Timings were performed using CNTPCT.
Worst case is a ~1 ms overhead in boot time.

                memset():    | assembly:
                ms (bytes)   | ms (bytes)
               --------------+--------------
Aarch64         0.30 (72824) | 0.08 (73528)
Aarch32         0.27 (65016) | 1.24 (65408)
Aarch32/pager   0.03 (11328) | 0.23 (11736)

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (QEMU)
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey 32/64)
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey/pager)
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

29 files changed, 61 insertions, 62 deletions

diff --git a/core/arch/arm/include/kernel/generic_boot.h b/core/arch/arm/include/kernel/generic_boot.h
index 3e537e3a..f262b296 100644
--- a/core/arch/arm/include/kernel/generic_boot.h
+++ b/core/arch/arm/include/kernel/generic_boot.h
@@ -56,7 +56,7 @@ void arm_cl2_config(vaddr_t pl310);
 void arm_cl2_enable(vaddr_t pl310);
 
 #if defined(CFG_BOOT_SECONDARY_REQUEST)
-extern paddr_t ns_entry_addrs[] __early_bss;
+extern paddr_t ns_entry_addrs[];
 int generic_boot_core_release(size_t core_idx, paddr_t entry);
 paddr_t generic_boot_core_hpen(void);
 #endif
@@ -90,8 +90,6 @@ extern uint8_t __data_start[];
 extern uint8_t __data_end[];
 extern uint8_t __rodata_start[];
 extern uint8_t __rodata_end[];
-extern uint8_t __early_bss_start[];
-extern uint8_t __early_bss_end[];
 extern uint8_t __bss_start[];
 extern uint8_t __bss_end[];
 extern uint8_t __nozi_start[];
diff --git a/core/arch/arm/kernel/generic_boot.c b/core/arch/arm/kernel/generic_boot.c
index 55a0fea2..c66f590b 100644
--- a/core/arch/arm/kernel/generic_boot.c
+++ b/core/arch/arm/kernel/generic_boot.c
@@ -74,8 +74,8 @@
 #define PADDR_INVALID		ULONG_MAX
 
 #if defined(CFG_BOOT_SECONDARY_REQUEST)
-paddr_t ns_entry_addrs[CFG_TEE_CORE_NB_CORE] __early_bss;
-static uint32_t spin_table[CFG_TEE_CORE_NB_CORE] __early_bss;
+paddr_t ns_entry_addrs[CFG_TEE_CORE_NB_CORE];
+static uint32_t spin_table[CFG_TEE_CORE_NB_CORE];
 #endif
 
 #ifdef CFG_BOOT_SYNC_CPU
@@ -84,7 +84,7 @@ static uint32_t spin_table[CFG_TEE_CORE_NB_CORE] __early_bss;
  * When 0, the cpu has not started.
  * When 1, it has started
  */
-uint32_t sem_cpu_sync[CFG_TEE_CORE_NB_CORE] __early_bss;
+uint32_t sem_cpu_sync[CFG_TEE_CORE_NB_CORE];
 KEEP_PAGER(sem_cpu_sync);
 #endif
 
@@ -210,13 +210,6 @@ static void init_runtime(unsigned long pageable_part)
 	assert(hash_size == (size_t)__tmp_hashes_size);
 
 	/*
-	 * Zero BSS area. Note that globals that would normally would go
-	 * into BSS which are used before this has to be put into .nozi.*
-	 * to avoid getting overwritten.
-	 */
-	memset(__bss_start, 0, __bss_end - __bss_start);
-
-	/*
 	 * This needs to be initialized early to support address lookup
 	 * in MEM_AREA_TEE_RAM
 	 */
@@ -373,7 +366,6 @@ static void init_asan(void)
 	asan_tag_access(&__initcall_start, &__initcall_end);
 	asan_tag_access(&__ctor_list, &__ctor_end);
 	asan_tag_access(__rodata_start, __rodata_end);
-	asan_tag_access(__early_bss_start, __early_bss_end);
 	asan_tag_access(__nozi_start, __nozi_end);
 
 	init_run_constructors();
@@ -389,13 +381,6 @@ static void init_asan(void)
 
 static void init_runtime(unsigned long pageable_part __unused)
 {
-	/*
-	 * Zero BSS area. Note that globals that would normally would go
-	 * into BSS which are used before this has to be put into .nozi.*
-	 * to avoid getting overwritten.
-	 */
-	memset(__bss_start, 0, __bss_end - __bss_start);
-
 	thread_init_boot_thread();
 
 	init_asan();
diff --git a/core/arch/arm/kernel/generic_entry_a32.S b/core/arch/arm/kernel/generic_entry_a32.S
index 20333f87..e97eb62a 100644
--- a/core/arch/arm/kernel/generic_entry_a32.S
+++ b/core/arch/arm/kernel/generic_entry_a32.S
@@ -316,6 +316,18 @@ copy_init:
 	bgt	copy_init
 #endif
 
+	/*
+	 * Clear .bss, this code obviously depends on the linker keeping
+	 * start/end of .bss at least 8 byte aligned.
+	 */
+	ldr	r0, =__bss_start
+	ldr	r1, =__bss_end
+	mov	r2, #0
+	mov	r3, #0
+clear_bss:
+	stmia	r0!, {r2, r3}
+	cmp	r0, r1
+	bls	clear_bss
 
 #ifdef CFG_CORE_SANITIZE_KADDRESS
 	/* First initialize the entire shadow area with no access */
diff --git a/core/arch/arm/kernel/generic_entry_a64.S b/core/arch/arm/kernel/generic_entry_a64.S
index 712971d4..781e2d4b 100644
--- a/core/arch/arm/kernel/generic_entry_a64.S
+++ b/core/arch/arm/kernel/generic_entry_a64.S
@@ -105,6 +105,17 @@ copy_init:
 	b.lt	copy_init
 #endif
 
+	/*
+	 * Clear .bss, this code obviously depends on the linker keeping
+	 * start/end of .bss at least 8 byte aligned.
+	 */
+	adr	x0, __bss_start
+	adr	x1, __bss_end
+clear_bss:
+	str	xzr, [x0], #8
+	cmp	x0, x1
+	b.lt	clear_bss
+
 	/* Setup SP_EL0 and SP_EL1, SP will be set to SP_EL0 */
 	set_sp
 
diff --git a/core/arch/arm/kernel/kern.ld.S b/core/arch/arm/kernel/kern.ld.S
index fb5d7f67..57509908 100644
--- a/core/arch/arm/kernel/kern.ld.S
+++ b/core/arch/arm/kernel/kern.ld.S
@@ -194,10 +194,6 @@ SECTIONS
 		__data_start_rom = .;
 		/* in one segment binaries, the rom data address is on top
 		   of the ram data address */
-		__early_bss_start = .;
-		*(.early_bss .early_bss.*)
-		. = ALIGN(8);
-		__early_bss_end = .;
 		__data_start = .;
 		*(.data .data.* .gnu.linkonce.d.*)
 		. = ALIGN(8);
diff --git a/core/arch/arm/kernel/link_dummy.ld b/core/arch/arm/kernel/link_dummy.ld
index 86fd4d71..01eb34d1 100644
--- a/core/arch/arm/kernel/link_dummy.ld
+++ b/core/arch/arm/kernel/link_dummy.ld
@@ -41,8 +41,6 @@ __bss_start = .;
 __ctor_end = .;
 __ctor_list = .;
 __data_end = .;
-__early_bss_end = .;
-__early_bss_start = .;
 __end = .;
 __end_phys_mem_map_section = .;
 __end_phys_sdp_mem_section = .;
diff --git a/core/arch/arm/mm/core_mmu.c b/core/arch/arm/mm/core_mmu.c
index 8a6fb93f..79aba863 100644
--- a/core/arch/arm/mm/core_mmu.c
+++ b/core/arch/arm/mm/core_mmu.c
@@ -60,12 +60,12 @@
  */
 
 /* Default NSec shared memory allocated from NSec world */
-unsigned long default_nsec_shm_size __early_bss;
-unsigned long default_nsec_shm_paddr __early_bss;
+unsigned long default_nsec_shm_size;
+unsigned long default_nsec_shm_paddr;
 
 static struct tee_mmap_region
-	static_memory_map[MAX_MMAP_REGIONS + 1] __early_bss;
-static bool mem_map_inited __early_bss;
+	static_memory_map[MAX_MMAP_REGIONS + 1];
+static bool mem_map_inited;
 
 /* Define the platform's memory layout. */
 struct memaccess_area {
diff --git a/core/arch/arm/mm/core_mmu_lpae.c b/core/arch/arm/mm/core_mmu_lpae.c
index f21a7e5c..377a590f 100644
--- a/core/arch/arm/mm/core_mmu_lpae.c
+++ b/core/arch/arm/mm/core_mmu_lpae.c
@@ -188,8 +188,8 @@ static uint64_t xlat_tables_ul1[CFG_NUM_THREADS][XLAT_TABLE_ENTRIES]
 	__aligned(XLAT_TABLE_SIZE) __section(".nozi.mmu.l2");
 
 
-static unsigned next_xlat __early_bss;
-static uint64_t tcr_ps_bits __early_bss;
+static unsigned int next_xlat;
+static uint64_t tcr_ps_bits;
 static int user_va_idx = -1;
 
 static uint32_t desc_to_mattr(unsigned level, uint64_t desc)
diff --git a/core/arch/arm/mm/core_mmu_v7.c b/core/arch/arm/mm/core_mmu_v7.c
index da8bc9c2..ceec45f1 100644
--- a/core/arch/arm/mm/core_mmu_v7.c
+++ b/core/arch/arm/mm/core_mmu_v7.c
@@ -241,7 +241,7 @@ static paddr_t core_mmu_get_ul1_ttb_pa(void)
 static void *core_mmu_alloc_l2(size_t size)
 {
 	/* Can't have this in .bss since it's not initialized yet */
-	static uint32_t tables_used __early_bss;
+	static uint32_t tables_used;
 	uint32_t to_alloc = ROUNDUP(size, NUM_L2_ENTRIES * SMALL_PAGE_SIZE) /
 		(NUM_L2_ENTRIES * SMALL_PAGE_SIZE);
 
diff --git a/core/arch/arm/mm/tee_mm.c b/core/arch/arm/mm/tee_mm.c
index 5f0281df..f5a5519e 100644
--- a/core/arch/arm/mm/tee_mm.c
+++ b/core/arch/arm/mm/tee_mm.c
@@ -348,10 +348,10 @@ bool tee_mm_is_empty(tee_mm_pool_t *pool)
 }
 
 /* Physical Secure DDR pool */
-tee_mm_pool_t tee_mm_sec_ddr __early_bss;
+tee_mm_pool_t tee_mm_sec_ddr;
 
 /* Virtual eSRAM pool */
-tee_mm_pool_t tee_mm_vcore __early_bss;
+tee_mm_pool_t tee_mm_vcore;
 
 tee_mm_entry_t *tee_mm_find(const tee_mm_pool_t *pool, paddr_t addr)
 {
diff --git a/core/arch/arm/plat-d02/main.c b/core/arch/arm/plat-d02/main.c
index 2cd339b5..e75f269e 100644
--- a/core/arch/arm/plat-d02/main.c
+++ b/core/arch/arm/plat-d02/main.c
@@ -51,7 +51,7 @@ static const struct thread_handlers handlers = {
 	.system_reset = pm_do_nothing,
 };
 
-static struct hi16xx_uart_data console_data __early_bss;
+static struct hi16xx_uart_data console_data;
 
 register_phys_mem(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, HI16XX_UART_REG_SIZE);
 
diff --git a/core/arch/arm/plat-hikey/main.c b/core/arch/arm/plat-hikey/main.c
index 8d72f388..360a571f 100644
--- a/core/arch/arm/plat-hikey/main.c
+++ b/core/arch/arm/plat-hikey/main.c
@@ -58,7 +58,7 @@ static const struct thread_handlers handlers = {
 	.system_reset = pm_do_nothing,
 };
 
-static struct pl011_data console_data __early_bss;
+static struct pl011_data console_data;
 
 register_phys_mem(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
 register_phys_mem(MEM_AREA_IO_NSEC, PMUSSI_BASE, PMUSSI_REG_SIZE);
diff --git a/core/arch/arm/plat-imx/imx_pl310.c b/core/arch/arm/plat-imx/imx_pl310.c
index 69e3f1e5..97761f35 100644
--- a/core/arch/arm/plat-imx/imx_pl310.c
+++ b/core/arch/arm/plat-imx/imx_pl310.c
@@ -68,7 +68,7 @@ void arm_cl2_enable(vaddr_t pl310_base)
 
 vaddr_t pl310_base(void)
 {
-	static void *va __early_bss;
+	static void *va;
 
 	if (cpu_mmu_enabled()) {
 		if (!va)
diff --git a/core/arch/arm/plat-imx/main.c b/core/arch/arm/plat-imx/main.c
index 20190068..11c8fdf4 100644
--- a/core/arch/arm/plat-imx/main.c
+++ b/core/arch/arm/plat-imx/main.c
@@ -60,7 +60,7 @@ static const struct thread_handlers handlers = {
 	.system_reset = pm_panic,
 };
 
-static struct imx_uart_data console_data __early_bss;
+static struct imx_uart_data console_data;
 
 register_phys_mem(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, CORE_MMU_DEVICE_SIZE);
 register_phys_mem(MEM_AREA_IO_SEC, GIC_BASE, CORE_MMU_DEVICE_SIZE);
diff --git a/core/arch/arm/plat-imx/psci.c b/core/arch/arm/plat-imx/psci.c
index 12b60fbe..2b89f8e0 100644
--- a/core/arch/arm/plat-imx/psci.c
+++ b/core/arch/arm/plat-imx/psci.c
@@ -43,8 +43,7 @@
 
 static vaddr_t src_base(void)
 {
-	/* in case it's used before .bss is cleared */
-	static void *va __early_bss;
+	static void *va;
 
 	if (cpu_mmu_enabled()) {
 		if (!va)
diff --git a/core/arch/arm/plat-ls/main.c b/core/arch/arm/plat-ls/main.c
index 7f8d523d..d76f2a72 100644
--- a/core/arch/arm/plat-ls/main.c
+++ b/core/arch/arm/plat-ls/main.c
@@ -58,7 +58,7 @@ static const struct thread_handlers handlers = {
 };
 
 static struct gic_data gic_data;
-static struct ns16550_data console_data __early_bss;
+static struct ns16550_data console_data;
 
 register_phys_mem(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, CORE_MMU_DEVICE_SIZE);
 register_phys_mem(MEM_AREA_IO_SEC, GIC_BASE, CORE_MMU_DEVICE_SIZE);
@@ -75,7 +75,7 @@ static void main_fiq(void)
 
 void plat_cpu_reset_late(void)
 {
-	static uint32_t cntfrq __early_bss;
+	static uint32_t cntfrq;
 	vaddr_t addr;
 
 	if (!get_core_pos()) {
diff --git a/core/arch/arm/plat-mediatek/main.c b/core/arch/arm/plat-mediatek/main.c
index ee07e782..4310da24 100644
--- a/core/arch/arm/plat-mediatek/main.c
+++ b/core/arch/arm/plat-mediatek/main.c
@@ -53,7 +53,7 @@ static const struct thread_handlers handlers = {
 	.system_reset = pm_do_nothing,
 };
 
-static struct serial8250_uart_data console_data __early_bss;
+static struct serial8250_uart_data console_data;
 
 const struct thread_handlers *generic_boot_get_handlers(void)
 {
diff --git a/core/arch/arm/plat-rcar/main.c b/core/arch/arm/plat-rcar/main.c
index 6a7e3320..06262e5f 100644
--- a/core/arch/arm/plat-rcar/main.c
+++ b/core/arch/arm/plat-rcar/main.c
@@ -55,7 +55,7 @@ static const struct thread_handlers handlers = {
 	.system_reset = pm_do_nothing,
 };
 
-static struct scif_uart_data console_data __early_bss;
+static struct scif_uart_data console_data;
 
 const struct thread_handlers *generic_boot_get_handlers(void)
 {
diff --git a/core/arch/arm/plat-rpi3/main.c b/core/arch/arm/plat-rpi3/main.c
index e9497dd0..995b4228 100644
--- a/core/arch/arm/plat-rpi3/main.c
+++ b/core/arch/arm/plat-rpi3/main.c
@@ -57,7 +57,7 @@ static const struct thread_handlers handlers = {
 	.system_reset = pm_do_nothing,
 };
 
-static struct serial8250_uart_data console_data __early_bss;
+static struct serial8250_uart_data console_data;
 
 const struct thread_handlers *generic_boot_get_handlers(void)
 {
diff --git a/core/arch/arm/plat-sprd/console.c b/core/arch/arm/plat-sprd/console.c
index ae56d956..5a8f9157 100644
--- a/core/arch/arm/plat-sprd/console.c
+++ b/core/arch/arm/plat-sprd/console.c
@@ -29,7 +29,7 @@
 #include <mm/core_memprot.h>
 #include <platform_config.h>
 
-static struct sprd_uart_data console_data __early_bss;
+static struct sprd_uart_data console_data;
 
 void console_init(void)
 {
diff --git a/core/arch/arm/plat-stm/main.c b/core/arch/arm/plat-stm/main.c
index 6446937d..e84f0daa 100644
--- a/core/arch/arm/plat-stm/main.c
+++ b/core/arch/arm/plat-stm/main.c
@@ -49,7 +49,7 @@ register_phys_mem(MEM_AREA_IO_SEC, RNG_BASE, RNG_SIZE);
 register_phys_mem(MEM_AREA_IO_NSEC, UART_CONSOLE_BASE, STIH_ASC_REG_SIZE);
 
 static struct gic_data gic_data;
-static struct stih_asc_pd console_data __early_bss;
+static struct stih_asc_pd console_data;
 
 static void main_fiq(void);
 
@@ -61,7 +61,7 @@ static bool ns_resources_ready(void)
 }
 #else
 /* some nonsecure resource might not be ready (uart) */
-static int boot_is_completed __early_bss;
+static int boot_is_completed;
 static bool ns_resources_ready(void)
 {
 	return !!boot_is_completed;
@@ -118,7 +118,7 @@ void console_flush(void)
 
 vaddr_t pl310_base(void)
 {
-	static void *va __early_bss;
+	static void *va;
 
 	if (cpu_mmu_enabled()) {
 		if (!va)
diff --git a/core/arch/arm/plat-stm/rng_support.c b/core/arch/arm/plat-stm/rng_support.c
index 25b38931..33843ada 100644
--- a/core/arch/arm/plat-stm/rng_support.c
+++ b/core/arch/arm/plat-stm/rng_support.c
@@ -44,7 +44,7 @@
 
 static vaddr_t rng_base(void)
 {
-	static void *va __early_bss;
+	static void *va;
 
 	if (cpu_mmu_enabled()) {
 		if (!va)
diff --git a/core/arch/arm/plat-sunxi/main.c b/core/arch/arm/plat-sunxi/main.c
index 5546c678..9ade6af7 100644
--- a/core/arch/arm/plat-sunxi/main.c
+++ b/core/arch/arm/plat-sunxi/main.c
@@ -176,7 +176,7 @@ void tee_entry_get_api_call_count(struct thread_smc_args *args)
 	args->a0 = tee_entry_generic_get_api_call_count() + 3;
 }
 
-static struct sunxi_uart_data console_data __early_bss;
+static struct sunxi_uart_data console_data;
 
 void console_init(void)
 {
diff --git a/core/arch/arm/plat-ti/main.c b/core/arch/arm/plat-ti/main.c
index dea35a7a..1ddce574 100644
--- a/core/arch/arm/plat-ti/main.c
+++ b/core/arch/arm/plat-ti/main.c
@@ -51,7 +51,7 @@
 #define PLAT_HW_UNIQUE_KEY_LENGTH 32
 
 static struct gic_data gic_data;
-static struct serial8250_uart_data console_data __early_bss;
+static struct serial8250_uart_data console_data;
 static uint8_t plat_huk[PLAT_HW_UNIQUE_KEY_LENGTH];
 
 register_phys_mem(MEM_AREA_RAM_SEC, TZDRAM_BASE, CFG_TEE_RAM_VA_SIZE);
diff --git a/core/arch/arm/plat-ti/ti_pl310.c b/core/arch/arm/plat-ti/ti_pl310.c
index 3c8d351b..42b076dc 100644
--- a/core/arch/arm/plat-ti/ti_pl310.c
+++ b/core/arch/arm/plat-ti/ti_pl310.c
@@ -37,7 +37,7 @@ register_phys_mem(MEM_AREA_IO_SEC, PL310_BASE, PL310_SIZE);
 
 vaddr_t pl310_base(void)
 {
-	static void *va __early_bss;
+	static void *va;
 
 	if (cpu_mmu_enabled()) {
 		if (!va)
diff --git a/core/arch/arm/plat-vexpress/main.c b/core/arch/arm/plat-vexpress/main.c
index 44eef24f..ea38e7ca 100644
--- a/core/arch/arm/plat-vexpress/main.c
+++ b/core/arch/arm/plat-vexpress/main.c
@@ -74,7 +74,7 @@ static const struct thread_handlers handlers = {
 };
 
 static struct gic_data gic_data;
-static struct pl011_data console_data __early_bss;
+static struct pl011_data console_data;
 
 register_phys_mem(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
 
diff --git a/core/arch/arm/plat-zynq7k/main.c b/core/arch/arm/plat-zynq7k/main.c
index 2991b948..ae22f8ff 100644
--- a/core/arch/arm/plat-zynq7k/main.c
+++ b/core/arch/arm/plat-zynq7k/main.c
@@ -61,7 +61,7 @@ static const struct thread_handlers handlers = {
 };
 
 static struct gic_data gic_data;
-static struct cdns_uart_data console_data __early_bss;
+static struct cdns_uart_data console_data;
 
 register_phys_mem(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, CORE_MMU_DEVICE_SIZE);
 register_phys_mem(MEM_AREA_IO_SEC, GIC_BASE, CORE_MMU_DEVICE_SIZE);
@@ -126,7 +126,7 @@ void console_init(void)
 
 vaddr_t pl310_base(void)
 {
-	static void *va __early_bss;
+	static void *va;
 
 	if (cpu_mmu_enabled()) {
 		if (!va)
@@ -207,7 +207,7 @@ static uint32_t write_slcr(uint32_t addr, uint32_t val)
 	for (i = 0; i < ARRAY_SIZE(slcr_access_range); i += 2) {
 		if (addr >= slcr_access_range[i] &&
 		    addr <= slcr_access_range[i+1]) {
-			static vaddr_t va __early_bss;
+			static vaddr_t va;
 
 			if (!va)
 				va = (vaddr_t)phys_to_virt(SLCR_BASE,
@@ -226,7 +226,7 @@ static uint32_t read_slcr(uint32_t addr, uint32_t *val)
 	for (i = 0; i < ARRAY_SIZE(slcr_access_range); i += 2) {
 		if (addr >= slcr_access_range[i] &&
 		    addr <= slcr_access_range[i+1]) {
-			static vaddr_t va __early_bss;
+			static vaddr_t va;
 
 			if (!va)
 				va = (vaddr_t)phys_to_virt(SLCR_BASE,
diff --git a/core/arch/arm/plat-zynqmp/main.c b/core/arch/arm/plat-zynqmp/main.c
index cccb0092..f49bcdd0 100644
--- a/core/arch/arm/plat-zynqmp/main.c
+++ b/core/arch/arm/plat-zynqmp/main.c
@@ -46,7 +46,7 @@
 
 static void main_fiq(void);
 static struct gic_data gic_data;
-static struct cdns_uart_data console_data __early_bss;
+static struct cdns_uart_data console_data;
 
 register_phys_mem(MEM_AREA_IO_SEC,
 		  ROUNDDOWN(CONSOLE_UART_BASE, CORE_MMU_DEVICE_SIZE),
diff --git a/core/kernel/console.c b/core/kernel/console.c
index ebd13b56..36eb38b3 100644
--- a/core/kernel/console.c
+++ b/core/kernel/console.c
@@ -37,7 +37,7 @@
 #include <libfdt.h>
 #endif
 
-static struct serial_chip *serial_console __early_bss;
+static struct serial_chip *serial_console;
 
 void __weak console_putc(int ch)
 {