core: change io_{clr|set|clrset}bits32() address argument type

Change API for io_clrbits32(), io_setbits32() and io_clrsetbits32() to
have a vaddr_t type address argument, rather than uintptr_t as
previously.

This change updates accordingly the callers of these functions
that cover only stm32mp1 related resources.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

2 files changed, 24 insertions, 24 deletions

diff --git a/core/drivers/stm32_etzpc.c b/core/drivers/stm32_etzpc.c
index 3940f4f5..5af3f363 100644
--- a/core/drivers/stm32_etzpc.c
+++ b/core/drivers/stm32_etzpc.c
@@ -87,7 +87,7 @@ struct etzpc_instance {
 /* Only 1 instance of the ETZPC is expected per platform */
 static struct etzpc_instance etzpc_dev;
 
-static uintptr_t etzpc_base(void)
+static vaddr_t etzpc_base(void)
 {
 	return io_pa_or_va(&etzpc_dev.base);
 }
@@ -105,10 +105,10 @@ static bool valid_tzma_id(unsigned int id)
 void etzpc_configure_decprot(uint32_t decprot_id,
 			     enum etzpc_decprot_attributes decprot_attr)
 {
-	uintptr_t offset = 4U * (decprot_id / IDS_PER_DECPROT_REGS);
+	size_t offset = 4U * (decprot_id / IDS_PER_DECPROT_REGS);
 	uint32_t shift = (decprot_id % IDS_PER_DECPROT_REGS) << DECPROT_SHIFT;
 	uint32_t masked_decprot = (uint32_t)decprot_attr & ETZPC_DECPROT0_MASK;
-	uintptr_t base = etzpc_base();
+	vaddr_t base = etzpc_base();
 
 	assert(valid_decprot_id(decprot_id));
 
@@ -126,9 +126,9 @@ void etzpc_configure_decprot(uint32_t decprot_id,
 
 enum etzpc_decprot_attributes etzpc_get_decprot(uint32_t decprot_id)
 {
-	uintptr_t offset = 4U * (decprot_id / IDS_PER_DECPROT_REGS);
+	size_t offset = 4U * (decprot_id / IDS_PER_DECPROT_REGS);
 	uint32_t shift = (decprot_id % IDS_PER_DECPROT_REGS) << DECPROT_SHIFT;
-	uintptr_t base = etzpc_base();
+	vaddr_t base = etzpc_base();
 	uint32_t value;
 
 	assert(valid_decprot_id(decprot_id));
@@ -141,9 +141,9 @@ enum etzpc_decprot_attributes etzpc_get_decprot(uint32_t decprot_id)
 
 void etzpc_lock_decprot(uint32_t decprot_id)
 {
-	uintptr_t offset = 4U * (decprot_id / IDS_PER_DECPROT_LOCK_REGS);
+	size_t offset = 4U * (decprot_id / IDS_PER_DECPROT_LOCK_REGS);
 	uint32_t mask = BIT(decprot_id % IDS_PER_DECPROT_LOCK_REGS);
-	uintptr_t base = etzpc_base();
+	vaddr_t base = etzpc_base();
 
 	assert(valid_decprot_id(decprot_id));
 
@@ -155,9 +155,9 @@ void etzpc_lock_decprot(uint32_t decprot_id)
 
 bool etzpc_get_lock_decprot(uint32_t decprot_id)
 {
-	uintptr_t offset = 4U * (decprot_id / IDS_PER_DECPROT_LOCK_REGS);
+	size_t offset = 4U * (decprot_id / IDS_PER_DECPROT_LOCK_REGS);
 	uint32_t mask = BIT(decprot_id % IDS_PER_DECPROT_LOCK_REGS);
-	uintptr_t base = etzpc_base();
+	vaddr_t base = etzpc_base();
 
 	assert(valid_decprot_id(decprot_id));
 
@@ -166,8 +166,8 @@ bool etzpc_get_lock_decprot(uint32_t decprot_id)
 
 void etzpc_configure_tzma(uint32_t tzma_id, uint16_t tzma_value)
 {
-	uintptr_t offset = sizeof(uint32_t) * tzma_id;
-	uintptr_t base = etzpc_base();
+	size_t offset = sizeof(uint32_t) * tzma_id;
+	vaddr_t base = etzpc_base();
 
 	assert(valid_tzma_id(tzma_id));
 
@@ -181,8 +181,8 @@ void etzpc_configure_tzma(uint32_t tzma_id, uint16_t tzma_value)
 
 uint16_t etzpc_get_tzma(uint32_t tzma_id)
 {
-	uintptr_t offset = sizeof(uint32_t) * tzma_id;
-	uintptr_t base = etzpc_base();
+	size_t offset = sizeof(uint32_t) * tzma_id;
+	vaddr_t base = etzpc_base();
 
 	assert(valid_tzma_id(tzma_id));
 
@@ -191,8 +191,8 @@ uint16_t etzpc_get_tzma(uint32_t tzma_id)
 
 void etzpc_lock_tzma(uint32_t tzma_id)
 {
-	uintptr_t offset = sizeof(uint32_t) * tzma_id;
-	uintptr_t base = etzpc_base();
+	size_t offset = sizeof(uint32_t) * tzma_id;
+	vaddr_t base = etzpc_base();
 
 	assert(valid_tzma_id(tzma_id));
 
@@ -204,8 +204,8 @@ void etzpc_lock_tzma(uint32_t tzma_id)
 
 bool etzpc_get_lock_tzma(uint32_t tzma_id)
 {
-	uintptr_t offset = sizeof(uint32_t) * tzma_id;
-	uintptr_t base = etzpc_base();
+	size_t offset = sizeof(uint32_t) * tzma_id;
+	vaddr_t base = etzpc_base();
 
 	assert(valid_tzma_id(tzma_id));
 
@@ -297,7 +297,7 @@ static void init_devive_from_hw_config(struct etzpc_instance *dev,
 
 	assert(!dev->base.pa && cpu_mmu_enabled());
 	dev->base.pa = pbase;
-	dev->base.va = (uintptr_t)phys_to_virt(dev->base.pa, MEM_AREA_IO_SEC);
+	dev->base.va = (vaddr_t)phys_to_virt(dev->base.pa, MEM_AREA_IO_SEC);
 	assert(etzpc_base());
 
 	get_hwcfg(&hwcfg);
diff --git a/core/drivers/stm32_gpio.c b/core/drivers/stm32_gpio.c
index e84a0e24..ea4ab00b 100644
--- a/core/drivers/stm32_gpio.c
+++ b/core/drivers/stm32_gpio.c
@@ -54,7 +54,7 @@ static unsigned int gpio_lock;
 /* Save to output @cfg the current GPIO (@bank/@pin) configuration */
 static void get_gpio_cfg(uint32_t bank, uint32_t pin, struct gpio_cfg *cfg)
 {
-	uintptr_t base = stm32_get_gpio_bank_base(bank);
+	vaddr_t base = stm32_get_gpio_bank_base(bank);
 	unsigned int clock = stm32_get_gpio_bank_clock(bank);
 
 	stm32_clock_enable(clock);
@@ -93,7 +93,7 @@ static void get_gpio_cfg(uint32_t bank, uint32_t pin, struct gpio_cfg *cfg)
 /* Apply GPIO (@bank/@pin) configuration described by @cfg */
 static void set_gpio_cfg(uint32_t bank, uint32_t pin, struct gpio_cfg *cfg)
 {
-	uintptr_t base = stm32_get_gpio_bank_base(bank);
+	vaddr_t base = stm32_get_gpio_bank_base(bank);
 	unsigned int clock = stm32_get_gpio_bank_clock(bank);
 	uint32_t excep = cpu_spin_lock_xsave(&gpio_lock);
 
@@ -353,7 +353,7 @@ int stm32_pinctrl_fdt_get_pinctrl(void *fdt, int device_node,
 static __maybe_unused bool valid_gpio_config(unsigned int bank,
 					     unsigned int pin, bool input)
 {
-	uintptr_t base = stm32_get_gpio_bank_base(bank);
+	vaddr_t base = stm32_get_gpio_bank_base(bank);
 	uint32_t mode = (read32(base + GPIO_MODER_OFFSET) >> (pin << 1)) &
 			GPIO_MODE_MASK;
 
@@ -368,7 +368,7 @@ static __maybe_unused bool valid_gpio_config(unsigned int bank,
 
 int stm32_gpio_get_input_level(unsigned int bank, unsigned int pin)
 {
-	uintptr_t base = stm32_get_gpio_bank_base(bank);
+	vaddr_t base = stm32_get_gpio_bank_base(bank);
 	unsigned int clock = stm32_get_gpio_bank_clock(bank);
 	int rc = 0;
 
@@ -386,7 +386,7 @@ int stm32_gpio_get_input_level(unsigned int bank, unsigned int pin)
 
 void stm32_gpio_set_output_level(unsigned int bank, unsigned int pin, int level)
 {
-	uintptr_t base = stm32_get_gpio_bank_base(bank);
+	vaddr_t base = stm32_get_gpio_bank_base(bank);
 	unsigned int clock = stm32_get_gpio_bank_clock(bank);
 
 	assert(valid_gpio_config(bank, pin, false));
@@ -403,7 +403,7 @@ void stm32_gpio_set_output_level(unsigned int bank, unsigned int pin, int level)
 
 void stm32_gpio_set_secure_cfg(unsigned int bank, unsigned int pin, bool secure)
 {
-	uintptr_t base = stm32_get_gpio_bank_base(bank);
+	vaddr_t base = stm32_get_gpio_bank_base(bank);
 	unsigned int clock = stm32_get_gpio_bank_clock(bank);
 	uint32_t excep = cpu_spin_lock_xsave(&gpio_lock);