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| author | Volodymyr Babchuk <vlad.babchuk@gmail.com> | 2017-04-18 22:41:29 +0300 |
|---|---|---|
| committer | Jérôme Forissier <jerome.forissier@linaro.org> | 2017-06-02 18:31:12 +0200 |
| commit | cc0b2c44812a06b805028965cc3d3c288dbd716d (patch) | |
| tree | dc751fb8216b7e2dfee3b9be80a4cbd0e5422c52 /core/arch/arm/plat-sunxi | |
| parent | bce4951c2b0143aadc21c1cb592eaf0fc1a87d75 (diff) | |
core_mmu: add non-secure DDR ranges support
This patch adds new macro `register_nsec_ddr` which allows
platform code to register non-secure memory ranges.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Diffstat (limited to 'core/arch/arm/plat-sunxi')
| -rw-r--r-- | core/arch/arm/plat-sunxi/kern.ld.S | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/core/arch/arm/plat-sunxi/kern.ld.S b/core/arch/arm/plat-sunxi/kern.ld.S index 05e9ce6c..f6218046 100644 --- a/core/arch/arm/plat-sunxi/kern.ld.S +++ b/core/arch/arm/plat-sunxi/kern.ld.S @@ -144,6 +144,10 @@ SECTIONS __start_phys_mem_map_section = . ; KEEP(*(phys_mem_map_section)) __end_phys_mem_map_section = . ; + . = ALIGN(8); + __start_phys_nsec_ddr_section = . ; + KEEP(*(phys_nsec_ddr_section)) + __end_phys_nsec_ddr_section = . ; . = ALIGN(4); __rodata_end = .; |