core: remove CFG_ prefix from CFG_SHMEM_START/_SIZE

Almost platform currently define these directives from within the
source code, through platform_config.h. These values do not need to
be configuration directive with the CFG_ prefix.

This change renames the CFG_SHMEM_xxx into TEE_SHMEM_xxx so that they
do not mess with the platform configuration directives. Yet, the old
CFG_SHMEM_START/SIZE directives can still be used by platform_config.h
to set TEE_SHMEM_START/SIZE if the platform supports it (i.e plat-stm).

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

21 files changed, 82 insertions, 78 deletions

diff --git a/core/arch/arm/mm/core_mmu.c b/core/arch/arm/mm/core_mmu.c
index 0f70f863..038a412a 100644
--- a/core/arch/arm/mm/core_mmu.c
+++ b/core/arch/arm/mm/core_mmu.c
@@ -86,7 +86,7 @@ static struct memaccess_area secure_only[] = {
 };
 
 static struct memaccess_area nsec_shared[] = {
-	MEMACCESS_AREA(CFG_SHMEM_START, CFG_SHMEM_SIZE),
+	MEMACCESS_AREA(TEE_SHMEM_START, TEE_SHMEM_SIZE),
 };
 
 #if defined(CFG_SECURE_DATA_PATH)
@@ -118,7 +118,7 @@ register_phys_mem_ul(MEM_AREA_TEE_ASAN, ASAN_MAP_PA, ASAN_MAP_SZ);
 #endif
 
 register_phys_mem(MEM_AREA_TA_RAM, TA_RAM_START, TA_RAM_SIZE);
-register_phys_mem(MEM_AREA_NSEC_SHM, CFG_SHMEM_START, CFG_SHMEM_SIZE);
+register_phys_mem(MEM_AREA_NSEC_SHM, TEE_SHMEM_START, TEE_SHMEM_SIZE);
 
 static bool _pbuf_intersects(struct memaccess_area *a, size_t alen,
 			     paddr_t pa, size_t size)
@@ -1049,8 +1049,8 @@ bool core_pbuf_is(uint32_t attr, paddr_t pbuf, size_t len)
 		return core_is_buffer_inside(pbuf, len, TA_RAM_START,
 							TA_RAM_SIZE);
 	case CORE_MEM_NSEC_SHM:
-		return core_is_buffer_inside(pbuf, len, CFG_SHMEM_START,
-							CFG_SHMEM_SIZE);
+		return core_is_buffer_inside(pbuf, len, TEE_SHMEM_START,
+							TEE_SHMEM_SIZE);
 	case CORE_MEM_SDP_MEM:
 		return pbuf_is_sdp_mem(pbuf, len);
 	case CORE_MEM_CACHED:
diff --git a/core/arch/arm/plat-d02/platform_config.h b/core/arch/arm/plat-d02/platform_config.h
index ccd0554f..7d54b421 100644
--- a/core/arch/arm/plat-d02/platform_config.h
+++ b/core/arch/arm/plat-d02/platform_config.h
@@ -99,8 +99,8 @@
 
 #endif /* CFG_WITH_PAGER */
 
-#define CFG_SHMEM_START		0x50000000
-#define CFG_SHMEM_SIZE		(4 * 1024 * 1024)
+#define TEE_SHMEM_START		0x50000000
+#define TEE_SHMEM_SIZE		(4 * 1024 * 1024)
 
 #define CFG_TEE_CORE_NB_CORE	16
 
diff --git a/core/arch/arm/plat-hikey/platform_config.h b/core/arch/arm/plat-hikey/platform_config.h
index a3fc0293..7e0af337 100644
--- a/core/arch/arm/plat-hikey/platform_config.h
+++ b/core/arch/arm/plat-hikey/platform_config.h
@@ -142,8 +142,8 @@
 
 #endif /* CFG_WITH_PAGER */
 
-#define CFG_SHMEM_START		0x3EE00000
-#define CFG_SHMEM_SIZE		(2 * 1024 * 1024)
+#define TEE_SHMEM_START		0x3EE00000
+#define TEE_SHMEM_SIZE		(2 * 1024 * 1024)
 
 #define CFG_TEE_CORE_NB_CORE	8
 
diff --git a/core/arch/arm/plat-imx/config/config_imx6sx.h b/core/arch/arm/plat-imx/config/config_imx6sx.h
index 9c4028da..ed5c4f55 100644
--- a/core/arch/arm/plat-imx/config/config_imx6sx.h
+++ b/core/arch/arm/plat-imx/config/config_imx6sx.h
@@ -22,9 +22,9 @@
 #define TZDRAM_BASE		(DRAM0_BASE - 32 * 1024 * 1024 + CFG_DDR_SIZE)
 #define TZDRAM_SIZE		(30 * 1024 * 1024)
 
-/* Full GlobalPlatform test suite requires CFG_SHMEM_SIZE to be at least 2MB */
-#define CFG_SHMEM_START		(TZDRAM_BASE + TZDRAM_SIZE)
-#define CFG_SHMEM_SIZE		0x200000
+/* Full GlobalPlatform test suite requires TEE_SHMEM_SIZE to be at least 2MB */
+#define TEE_SHMEM_START		(TZDRAM_BASE + TZDRAM_SIZE)
+#define TEE_SHMEM_SIZE		0x200000
 
 #define TEE_RAM_VA_SIZE		(1024 * 1024)
 
diff --git a/core/arch/arm/plat-imx/config/config_imx7.h b/core/arch/arm/plat-imx/config/config_imx7.h
index fbd9aa91..1b70f90e 100644
--- a/core/arch/arm/plat-imx/config/config_imx7.h
+++ b/core/arch/arm/plat-imx/config/config_imx7.h
@@ -20,9 +20,9 @@
 #define TZDRAM_BASE		(DRAM0_BASE + CFG_DDR_SIZE - 32 * 1024 * 1024)
 #define TZDRAM_SIZE		(30 * 1024 * 1024)
 
-/* Full GlobalPlatform test suite requires CFG_SHMEM_SIZE to be at least 2MB */
-#define CFG_SHMEM_START		(TZDRAM_BASE + TZDRAM_SIZE)
-#define CFG_SHMEM_SIZE		0x200000
+/* Full GlobalPlatform test suite requires TEE_SHMEM_SIZE to be at least 2MB */
+#define TEE_SHMEM_START		(TZDRAM_BASE + TZDRAM_SIZE)
+#define TEE_SHMEM_SIZE		0x200000
 
 #define TEE_RAM_VA_SIZE		(1024 * 1024)
 
diff --git a/core/arch/arm/plat-imx/platform_config.h b/core/arch/arm/plat-imx/platform_config.h
index 7da5bb47..aa3e417a 100644
--- a/core/arch/arm/plat-imx/platform_config.h
+++ b/core/arch/arm/plat-imx/platform_config.h
@@ -73,10 +73,10 @@
 #define TZDRAM_SIZE		(CFG_DDR_TEETZ_RESERVED_SIZE - \
 				 CFG_PUB_RAM_SIZE)
 
-#define CFG_SHMEM_START		(CFG_DDR_TEETZ_RESERVED_START + \
+#define TEE_SHMEM_START		(CFG_DDR_TEETZ_RESERVED_START + \
 				 TZDRAM_SIZE)
-/* Full GlobalPlatform test suite requires CFG_SHMEM_SIZE to be at least 2MB */
-#define CFG_SHMEM_SIZE		CFG_PUB_RAM_SIZE
+/* Full GlobalPlatform test suite requires TEE_SHMEM_SIZE to be at least 2MB */
+#define TEE_SHMEM_SIZE		CFG_PUB_RAM_SIZE
 
 /*
  * Everything is in TZDRAM.
@@ -318,9 +318,9 @@
 
 #endif /* CFG_WITH_PAGER */
 
-#define CFG_SHMEM_START			(CFG_DDR_TEETZ_RESERVED_START + \
+#define TEE_SHMEM_START			(CFG_DDR_TEETZ_RESERVED_START + \
 					 TZDRAM_SIZE)
-#define CFG_SHMEM_SIZE			CFG_PUB_RAM_SIZE
+#define TEE_SHMEM_SIZE			CFG_PUB_RAM_SIZE
 
 #define TEE_RAM_START			TZDRAM_BASE
 
diff --git a/core/arch/arm/plat-ls/platform_config.h b/core/arch/arm/plat-ls/platform_config.h
index f82cf6e5..9fa4a008 100644
--- a/core/arch/arm/plat-ls/platform_config.h
+++ b/core/arch/arm/plat-ls/platform_config.h
@@ -148,8 +148,8 @@
 #define TZDRAM_BASE			(CFG_DDR_TEETZ_RESERVED_START)
 #define TZDRAM_SIZE			(TEE_RAM_PH_SIZE + TA_RAM_SIZE)
 
-#define CFG_SHMEM_START			(TZDRAM_BASE + TZDRAM_SIZE)
-#define CFG_SHMEM_SIZE			 CFG_PUB_RAM_SIZE
+#define TEE_SHMEM_START			(TZDRAM_BASE + TZDRAM_SIZE)
+#define TEE_SHMEM_SIZE			 CFG_PUB_RAM_SIZE
 
 /* define the memory areas (TEE_RAM must start at reserved DDR start addr */
 #define TEE_RAM_START			TZDRAM_BASE
diff --git a/core/arch/arm/plat-marvell/platform_config.h b/core/arch/arm/plat-marvell/platform_config.h
index 1c3f15dc..bcb4a13a 100644
--- a/core/arch/arm/plat-marvell/platform_config.h
+++ b/core/arch/arm/plat-marvell/platform_config.h
@@ -71,8 +71,8 @@
 
 #define CFG_TEE_CORE_NB_CORE	4
 
-#define CFG_SHMEM_START		(TZDRAM_BASE + TZDRAM_SIZE)
-#define CFG_SHMEM_SIZE		0x00400000
+#define TEE_SHMEM_START		(TZDRAM_BASE + TZDRAM_SIZE)
+#define TEE_SHMEM_SIZE		0x00400000
 
 #define GICC_OFFSET		0x10000
 #define GICD_OFFSET		0x0
@@ -117,8 +117,8 @@
 
 #define CFG_TEE_CORE_NB_CORE	2
 
-#define CFG_SHMEM_START		(TZDRAM_BASE + TZDRAM_SIZE)
-#define CFG_SHMEM_SIZE		0x00400000
+#define TEE_SHMEM_START		(TZDRAM_BASE + TZDRAM_SIZE)
+#define TEE_SHMEM_SIZE		0x00400000
 
 #else
 #error "Unknown platform flavor"
diff --git a/core/arch/arm/plat-mediatek/platform_config.h b/core/arch/arm/plat-mediatek/platform_config.h
index 9157324f..21fa2ca2 100644
--- a/core/arch/arm/plat-mediatek/platform_config.h
+++ b/core/arch/arm/plat-mediatek/platform_config.h
@@ -39,9 +39,9 @@
 
 #define CFG_TEE_CORE_NB_CORE	4
 
-/* Full GlobalPlatform test suite requires CFG_SHMEM_SIZE to be at least 2MB */
-#define CFG_SHMEM_START		(TZDRAM_BASE - 0x200000)
-#define CFG_SHMEM_SIZE		0x200000
+/* Full GlobalPlatform test suite requires TEE_SHMEM_SIZE to be at least 2MB */
+#define TEE_SHMEM_START		(TZDRAM_BASE - 0x200000)
+#define TEE_SHMEM_SIZE		0x200000
 
 #else
 #error "Unknown platform flavor"
diff --git a/core/arch/arm/plat-poplar/platform_config.h b/core/arch/arm/plat-poplar/platform_config.h
index 62beaa5d..750051f8 100644
--- a/core/arch/arm/plat-poplar/platform_config.h
+++ b/core/arch/arm/plat-poplar/platform_config.h
@@ -139,8 +139,8 @@
 
 #endif /* CFG_WITH_PAGER */
 
-#define CFG_SHMEM_START		0x02400000
-#define CFG_SHMEM_SIZE		(4 * 1024 * 1024)
+#define TEE_SHMEM_START		0x02400000
+#define TEE_SHMEM_SIZE		(4 * 1024 * 1024)
 
 #define CFG_TEE_CORE_NB_CORE	4
 
diff --git a/core/arch/arm/plat-rcar/platform_config.h b/core/arch/arm/plat-rcar/platform_config.h
index baea1234..c59fbf28 100644
--- a/core/arch/arm/plat-rcar/platform_config.h
+++ b/core/arch/arm/plat-rcar/platform_config.h
@@ -68,9 +68,9 @@
 
 #endif
 
-/* Full GlobalPlatform test suite requires CFG_SHMEM_SIZE to be at least 2MB */
-#define CFG_SHMEM_START		(TZDRAM_BASE + TZDRAM_SIZE)
-#define CFG_SHMEM_SIZE		0x100000
+/* Full GlobalPlatform test suite requires TEE_SHMEM_SIZE to be at least 2MB */
+#define TEE_SHMEM_START		(TZDRAM_BASE + TZDRAM_SIZE)
+#define TEE_SHMEM_SIZE		0x100000
 
 #define TEE_RAM_VA_SIZE		(1024 * 1024)
 
diff --git a/core/arch/arm/plat-rockchip/platform_config.h b/core/arch/arm/plat-rockchip/platform_config.h
index b099a403..c1582ef7 100644
--- a/core/arch/arm/plat-rockchip/platform_config.h
+++ b/core/arch/arm/plat-rockchip/platform_config.h
@@ -85,8 +85,8 @@
 
 #define TA_RAM_START		(TEE_RAM_START + TEE_RAM_SIZE)
 #define TA_RAM_SIZE		(1024 * 1024)
-#define CFG_SHMEM_START		(TA_RAM_START + TA_RAM_SIZE)
-#define CFG_SHMEM_SIZE		(1024 * 1024)
+#define TEE_SHMEM_START		(TA_RAM_START + TA_RAM_SIZE)
+#define TEE_SHMEM_SIZE		(1024 * 1024)
 
 /* Location of trusted dram */
 #define TZDRAM_BASE		CFG_TZDRAM_RSV_START
diff --git a/core/arch/arm/plat-rpi3/platform_config.h b/core/arch/arm/plat-rpi3/platform_config.h
index a1e99667..104c0761 100644
--- a/core/arch/arm/plat-rpi3/platform_config.h
+++ b/core/arch/arm/plat-rpi3/platform_config.h
@@ -67,10 +67,10 @@
 #define DRAM0_SIZE		0x40000000
 
 /* Below ARM-TF */
-#define CFG_SHMEM_START		(0x08000000)
-#define CFG_SHMEM_SIZE		(4 * 1024 * 1024)
+#define TEE_SHMEM_START		(0x08000000)
+#define TEE_SHMEM_SIZE		(4 * 1024 * 1024)
 
-#define TZDRAM_BASE		(CFG_SHMEM_START + CFG_SHMEM_SIZE)
+#define TZDRAM_BASE		(TEE_SHMEM_START + TEE_SHMEM_SIZE)
 #define TZDRAM_SIZE		(32 * 1024 * 1024)
 
 #define CFG_TEE_CORE_NB_CORE	4
diff --git a/core/arch/arm/plat-sam/platform_config.h b/core/arch/arm/plat-sam/platform_config.h
index 2ea7b255..3d800d21 100644
--- a/core/arch/arm/plat-sam/platform_config.h
+++ b/core/arch/arm/plat-sam/platform_config.h
@@ -48,7 +48,7 @@
  * |      Linux memory     |
  * +-----------------------+ 0x30C0_0000
  * |      SHMEM 4MiB       |
- * +-----------------------+ 0x3080_0000 [CFG_SHMEM_START]
+ * +-----------------------+ 0x3080_0000 [TEE_SHMEM_START]
  * |        | TA_RAM 7MiB  |
  * + TZDRAM +--------------+ 0x3010_0000 [TA_RAM_START]
  * |        | TEE_RAM 1MiB |
@@ -60,8 +60,8 @@
 #define TZDRAM_BASE         0x30000000
 #define TZDRAM_SIZE         (8 * 1024 * 1024)
 
-#define CFG_SHMEM_START     (TZDRAM_BASE + TZDRAM_SIZE)
-#define CFG_SHMEM_SIZE      (4 * 1024 * 1024)
+#define TEE_SHMEM_START		(TZDRAM_BASE + TZDRAM_SIZE)
+#define TEE_SHMEM_SIZE		(4 * 1024 * 1024)
 
 #define TEE_RAM_START		TZDRAM_BASE
 #define TEE_RAM_VA_SIZE		(1 * 1024 * 1024)
diff --git a/core/arch/arm/plat-sprd/platform_config.h b/core/arch/arm/plat-sprd/platform_config.h
index d8754b90..1fc232e7 100644
--- a/core/arch/arm/plat-sprd/platform_config.h
+++ b/core/arch/arm/plat-sprd/platform_config.h
@@ -52,12 +52,12 @@
 #define DRAM0_SIZE		0x20000000
 
 #define TZDRAM_BASE		0x8f600000
-#define TZDRAM_SIZE		(0x02000000 - CFG_SHMEM_SIZE)
+#define TZDRAM_SIZE		(0x02000000 - TEE_SHMEM_SIZE)
 
 #define CFG_TEE_CORE_NB_CORE	8
 
-#define CFG_SHMEM_START		(TZDRAM_BASE + TZDRAM_SIZE)
-#define CFG_SHMEM_SIZE		0x200000
+#define TEE_SHMEM_START		(TZDRAM_BASE + TZDRAM_SIZE)
+#define TEE_SHMEM_SIZE		0x200000
 
 #define GICC_OFFSET		0x2000
 #define GICD_OFFSET		0x1000
diff --git a/core/arch/arm/plat-stm/platform_config.h b/core/arch/arm/plat-stm/platform_config.h
index 4b0067a7..a2077a14 100644
--- a/core/arch/arm/plat-stm/platform_config.h
+++ b/core/arch/arm/plat-stm/platform_config.h
@@ -261,14 +261,18 @@
  */
 
 /* default locate shared memory at the end of the TEE reserved DDR */
-#ifndef CFG_SHMEM_SIZE
-#define CFG_SHMEM_SIZE		(2 * 1024 * 1024)
+#ifdef CFG_SHMEM_SIZE
+#define TEE_SHMEM_SIZE		CFG_SHMEM_SIZE
+#else
+#define TEE_SHMEM_SIZE		(2 * 1024 * 1024)
 #endif
 
-#ifndef CFG_SHMEM_START
-#define CFG_SHMEM_START		(CFG_DDR_TEETZ_RESERVED_START + \
-				CFG_DDR_TEETZ_RESERVED_SIZE - \
-				CFG_SHMEM_SIZE)
+#ifdef CFG_SHMEM_START
+#define TEE_SHMEM_START		CFG_SHMEM_START
+#else
+#define TEE_SHMEM_START		(CFG_DDR_TEETZ_RESERVED_START + \
+					CFG_DDR_TEETZ_RESERVED_SIZE - \
+					TEE_SHMEM_SIZE)
 #endif
 
 /*
@@ -288,7 +292,7 @@
 #define TEE_SDP_MEM_SIZE	TEE_SDP_TEST_MEM_SIZE
 #define TEE_SDP_MEM_BASE	(CFG_DDR_TEETZ_RESERVED_START + \
 					CFG_DDR_TEETZ_RESERVED_SIZE - \
-					CFG_SHMEM_SIZE - TEE_SDP_MEM_SIZE)
+					TEE_SHMEM_SIZE - TEE_SDP_MEM_SIZE)
 #endif
 #ifndef TEE_SDP_TEST_MEM_SIZE
 #define TEE_SDP_TEST_MEM_SIZE	0
@@ -301,7 +305,7 @@
 
 #define TZDRAM_BASE		CFG_DDR_TEETZ_RESERVED_START
 #define TZDRAM_SIZE		(CFG_DDR_TEETZ_RESERVED_SIZE - \
-				CFG_SHMEM_SIZE - \
+					TEE_SHMEM_SIZE - \
 					TEE_SDP_TEST_MEM_SIZE)
 
 #define TEE_RAM_START		TZSRAM_BASE
@@ -314,7 +318,7 @@
 
 #define TZDRAM_BASE		CFG_DDR_TEETZ_RESERVED_START
 #define TZDRAM_SIZE		(CFG_DDR_TEETZ_RESERVED_SIZE - \
-					CFG_SHMEM_SIZE - \
+					TEE_SHMEM_SIZE - \
 					TEE_SDP_TEST_MEM_SIZE)
 
 #define TEE_RAM_START		TZDRAM_BASE
diff --git a/core/arch/arm/plat-ti/platform_config.h b/core/arch/arm/plat-ti/platform_config.h
index 745985c4..70739742 100644
--- a/core/arch/arm/plat-ti/platform_config.h
+++ b/core/arch/arm/plat-ti/platform_config.h
@@ -147,8 +147,8 @@
 					  TEE_SDP_TEST_MEM_SIZE, \
 					  CORE_MMU_DEVICE_SIZE)
 
-/* Full GlobalPlatform test suite requires CFG_SHMEM_SIZE to be at least 2MB */
-#define CFG_SHMEM_START         (TZDRAM_BASE + TZDRAM_SIZE)
-#define CFG_SHMEM_SIZE          (4 * 1024 * 1024)
+/* Full GlobalPlatform test suite requires TEE_SHMEM_SIZE to be at least 2MB */
+#define TEE_SHMEM_START         (TZDRAM_BASE + TZDRAM_SIZE)
+#define TEE_SHMEM_SIZE          (4 * 1024 * 1024)
 
 #endif /*PLATFORM_CONFIG_H*/
diff --git a/core/arch/arm/plat-vexpress/platform_config.h b/core/arch/arm/plat-vexpress/platform_config.h
index 544e5cda..0e8249e9 100644
--- a/core/arch/arm/plat-vexpress/platform_config.h
+++ b/core/arch/arm/plat-vexpress/platform_config.h
@@ -108,8 +108,8 @@
 
 #define CFG_TEE_CORE_NB_CORE	8
 
-#define CFG_SHMEM_START		(DRAM0_BASE + 0x3000000)
-#define CFG_SHMEM_SIZE		0x200000
+#define TEE_SHMEM_START		(DRAM0_BASE + 0x3000000)
+#define TEE_SHMEM_SIZE		0x200000
 
 #define GICC_OFFSET		0x0
 #define GICD_OFFSET		0x3000000
@@ -151,8 +151,8 @@
 
 #define CFG_TEE_CORE_NB_CORE	6
 
-#define CFG_SHMEM_START		(DRAM0_BASE + DRAM0_SIZE - CFG_SHMEM_SIZE)
-#define CFG_SHMEM_SIZE		0x200000
+#define TEE_SHMEM_START		(DRAM0_BASE + DRAM0_SIZE - TEE_SHMEM_SIZE)
+#define TEE_SHMEM_SIZE		0x200000
 
 #define GICC_OFFSET		0x1f000
 #define GICD_OFFSET		0
@@ -163,10 +163,10 @@
  */
 
 #define DRAM0_BASE		UINTPTR_C(0x40000000)
-#define DRAM0_SIZE		(UINTPTR_C(0x42100000) - CFG_SHMEM_SIZE)
+#define DRAM0_SIZE		(UINTPTR_C(0x42100000) - TEE_SHMEM_SIZE)
 
 #define DRAM0_TEERES_BASE	(DRAM0_BASE + DRAM0_SIZE)
-#define DRAM0_TEERES_SIZE	CFG_SHMEM_SIZE
+#define DRAM0_TEERES_SIZE	TEE_SHMEM_SIZE
 
 #define SECRAM_BASE		0x0e000000
 #define SECRAM_SIZE		0x01000000
@@ -192,9 +192,9 @@
 
 #define CFG_TEE_CORE_NB_CORE	4
 
-#define CFG_SHMEM_START		(DRAM0_TEERES_BASE + \
-					(DRAM0_TEERES_SIZE - CFG_SHMEM_SIZE))
-#define CFG_SHMEM_SIZE		0x200000
+#define TEE_SHMEM_START		(DRAM0_TEERES_BASE + \
+					(DRAM0_TEERES_SIZE - TEE_SHMEM_SIZE))
+#define TEE_SHMEM_SIZE		0x200000
 
 #define GICD_OFFSET		0
 #define GICC_OFFSET		0x10000
@@ -203,7 +203,7 @@
 #elif defined(PLATFORM_FLAVOR_qemu_armv8a)
 
 #define DRAM0_BASE		UINTPTR_C(0x40000000)
-#define DRAM0_SIZE		(UINTPTR_C(0x40000000) - CFG_SHMEM_SIZE)
+#define DRAM0_SIZE		(UINTPTR_C(0x40000000) - TEE_SHMEM_SIZE)
 
 #define SECRAM_BASE		0x0e000000
 #define SECRAM_SIZE		0x01000000
@@ -230,11 +230,11 @@
 #define CFG_TEE_CORE_NB_CORE	2
 
 /*
- * CFG_SHMEM_START chosen arbitrary, in a way that it does not interfere
+ * TEE_SHMEM_START chosen arbitrary, in a way that it does not interfere
  * with initial location of linux kernel, dtb and initrd
  */
-#define CFG_SHMEM_START	(DRAM0_BASE + 0x2000000)
-#define CFG_SHMEM_SIZE		0x200000
+#define TEE_SHMEM_START		(DRAM0_BASE + 0x2000000)
+#define TEE_SHMEM_SIZE		0x200000
 
 #else
 #error "Unknown platform flavor"
diff --git a/core/arch/arm/plat-zynq7k/platform_config.h b/core/arch/arm/plat-zynq7k/platform_config.h
index 580f1f21..bac9a51c 100644
--- a/core/arch/arm/plat-zynq7k/platform_config.h
+++ b/core/arch/arm/plat-zynq7k/platform_config.h
@@ -212,11 +212,11 @@
 
 #define TZDRAM_BASE			(CFG_DDR_TEETZ_RESERVED_START)
 #define TZDRAM_SIZE				(CFG_DDR_TEETZ_RESERVED_SIZE - \
-						CFG_PUB_RAM_SIZE)
+							CFG_PUB_RAM_SIZE)
 
-#define CFG_SHMEM_START			(CFG_DDR_TEETZ_RESERVED_START + \
+#define TEE_SHMEM_START			(CFG_DDR_TEETZ_RESERVED_START + \
 						TZDRAM_SIZE)
-#define CFG_SHMEM_SIZE			CFG_PUB_RAM_SIZE
+#define TEE_SHMEM_SIZE			CFG_PUB_RAM_SIZE
 
 #define TA_RAM_START			TZDRAM_BASE
 #define TA_RAM_SIZE			TZDRAM_SIZE
@@ -262,9 +262,9 @@
 						TEE_RAM_PH_SIZE - \
 						CFG_PUB_RAM_SIZE)
 
-#define CFG_SHMEM_START			(CFG_DDR_TEETZ_RESERVED_START + \
+#define TEE_SHMEM_START			(CFG_DDR_TEETZ_RESERVED_START + \
 						TZDRAM_SIZE)
-#define CFG_SHMEM_SIZE			CFG_PUB_RAM_SIZE
+#define TEE_SHMEM_SIZE			CFG_PUB_RAM_SIZE
 
 #define TEE_RAM_START			TZDRAM_BASE
 
diff --git a/core/arch/arm/plat-zynqmp/platform_config.h b/core/arch/arm/plat-zynqmp/platform_config.h
index d093bdd8..9b5985fc 100644
--- a/core/arch/arm/plat-zynqmp/platform_config.h
+++ b/core/arch/arm/plat-zynqmp/platform_config.h
@@ -60,8 +60,8 @@
 #define TZDRAM_BASE		0x60000000
 #define TZDRAM_SIZE		0x10000000
 
-#define CFG_SHMEM_START		0x70000000
-#define CFG_SHMEM_SIZE		0x10000000
+#define TEE_SHMEM_START		0x70000000
+#define TEE_SHMEM_SIZE		0x10000000
 
 #define GICD_OFFSET		0
 #define GICC_OFFSET		0x20000
diff --git a/documentation/porting_guidelines.md b/documentation/porting_guidelines.md
index 702df73b..c8e1d210 100644
--- a/documentation/porting_guidelines.md
+++ b/documentation/porting_guidelines.md
@@ -147,8 +147,8 @@ could look like this:
 #define DRAM0_SIZE		0x40000000
 
 /* Below ARM-TF */
-#define CFG_SHMEM_START		0x08000000
-#define CFG_SHMEM_SIZE		(4 * 1024 * 1024)
+#define TEE_SHMEM_START		0x08000000
+#define TEE_SHMEM_SIZE		(4 * 1024 * 1024)
 
 /* If your device has SRAM */
 #define TZSRAM_BASE		0x3F000000