diff options
| author | Andre Przywara <andre.przywara@arm.com> | 2016-02-06 17:08:00 +0000 |
|---|---|---|
| committer | Andre Przywara <andre.przywara@arm.com> | 2016-02-16 01:35:09 +0000 |
| commit | 77e8eee85765d55768017f653adf8132d75e5143 (patch) | |
| tree | 8f4e5a4245be2769d29bd42002ed311aee9c3f5b /plat | |
| parent | fec2e9b4610a0475dc5073157d018f165ecfff71 (diff) | |
sun50i: platform.S: clean up serial console
Add some constants to the console code to make it more readable.
Diffstat (limited to 'plat')
| -rw-r--r-- | plat/sun50iw1p1/aarch64/plat_helpers.S | 21 | ||||
| -rw-r--r-- | plat/sun50iw1p1/sun50iw1p1.h | 10 |
2 files changed, 16 insertions, 15 deletions
diff --git a/plat/sun50iw1p1/aarch64/plat_helpers.S b/plat/sun50iw1p1/aarch64/plat_helpers.S index 690de8d..7a1e851 100644 --- a/plat/sun50iw1p1/aarch64/plat_helpers.S +++ b/plat/sun50iw1p1/aarch64/plat_helpers.S @@ -59,20 +59,21 @@ func platform_smp_init msr cntvoff_el2, x0 ret +#define UART_TX 0 /* Out: Transmit buffer */ +#define UART_LSR 5 /* In: Line Status Register */ +#define UART_LSR_TEMT_BIT 6 /* Transmitter empty */ + +/* Use UART0 both for the normal console and for the crash console as well. */ +plat_crash_console_putc: func console_core_putc - ldr x1, =0x01c28000 + ldr x1, =SUNXI_UART0_BASE 1: - ldr w2, [x1,#20] - tbz w2, #6, 1b - str w0, [x1,#0] + ldr w2, [x1, #(UART_LSR * 4)] + tbz w2, #UART_LSR_TEMT_BIT, 1b + str w0, [x1, #0] ret +/* nothing to do here, just return 1 to indicate success */ func plat_crash_console_init mov w0, #1 ret - -func plat_crash_console_putc - b console_core_putc - - - diff --git a/plat/sun50iw1p1/sun50iw1p1.h b/plat/sun50iw1p1/sun50iw1p1.h index 2013b38..5f00f1a 100644 --- a/plat/sun50iw1p1/sun50iw1p1.h +++ b/plat/sun50iw1p1/sun50iw1p1.h @@ -71,11 +71,11 @@ #define SUNXI_SPC_BASE (0x01c23400L) #define SUNXI_THC_BASE (0x01c25000L) -#define SUNXI_UART0_BASE (0x01c28000L) -#define SUNXI_UART1_BASE (0x01c28400L) -#define SUNXI_UART2_BASE (0x01c28800L) -#define SUNXI_UART3_BASE (0x01c28c00L) -#define SUNXI_UART4_BASE (0x01c29000L) +#define SUNXI_UART0_BASE 0x01c28000 +#define SUNXI_UART1_BASE 0x01c28400 +#define SUNXI_UART2_BASE 0x01c28800 +#define SUNXI_UART3_BASE 0x01c28c00 +#define SUNXI_UART4_BASE 0x01c29000 #define SUNXI_TWI0_BASE (0x01c2ac00L) #define SUNXI_TWI1_BASE (0x01c2b000L) |