diff options
| author | danh-arm <dan.handley@arm.com> | 2014-08-14 09:52:22 +0100 |
|---|---|---|
| committer | danh-arm <dan.handley@arm.com> | 2014-08-14 09:52:22 +0100 |
| commit | f0e240d7f59cbf1cb99fc358ddec967cad8bf3df (patch) | |
| tree | 57cc314b22f36614f19a56678f3ea56196cdab6f /plat/fvp/include | |
| parent | 233020911d02474ac9870dc4067576f3ee675af6 (diff) | |
| parent | 186c1d4b26ece7888a3dcea0a3673c04fb35b7c1 (diff) | |
Merge pull request #184 from jcastillo-arm/jc/tf-issues/100
FVP: make usage of Trusted DRAM optional at build time
Diffstat (limited to 'plat/fvp/include')
| -rw-r--r-- | plat/fvp/include/platform_def.h | 61 |
1 files changed, 25 insertions, 36 deletions
diff --git a/plat/fvp/include/platform_def.h b/plat/fvp/include/platform_def.h index ee0c3f4..734f28c 100644 --- a/plat/fvp/include/platform_def.h +++ b/plat/fvp/include/platform_def.h @@ -32,6 +32,7 @@ #define __PLATFORM_DEF_H__ #include <arch.h> +#include <../fvp_def.h> /******************************************************************************* @@ -84,31 +85,20 @@ #define MAX_IO_HANDLES 4 /******************************************************************************* - * Platform memory map related constants - ******************************************************************************/ -#define TZROM_BASE 0x00000000 -#define TZROM_SIZE 0x04000000 - -#define TZRAM_BASE 0x04000000 -#define TZRAM_SIZE 0x40000 - -/* Location of trusted dram on the base fvp */ -#define TZDRAM_BASE 0x06000000 -#define TZDRAM_SIZE 0x02000000 - -/******************************************************************************* * BL1 specific defines. * BL1 RW data is relocated from ROM to RAM at runtime so we need 2 sets of * addresses. ******************************************************************************/ -#define BL1_RO_BASE TZROM_BASE -#define BL1_RO_LIMIT (TZROM_BASE + TZROM_SIZE) +#define BL1_RO_BASE FVP_TRUSTED_ROM_BASE +#define BL1_RO_LIMIT (FVP_TRUSTED_ROM_BASE \ + + FVP_TRUSTED_ROM_SIZE) /* - * Put BL1 RW at the top of the Trusted SRAM. BL1_RW_BASE is calculated using - * the current BL1 RW debug size plus a little space for growth. + * Put BL1 RW at the top of the Trusted SRAM (just below the shared memory, if + * present). BL1_RW_BASE is calculated using the current BL1 RW debug size plus + * a little space for growth. */ -#define BL1_RW_BASE (TZRAM_BASE + TZRAM_SIZE - 0x6000) -#define BL1_RW_LIMIT (TZRAM_BASE + TZRAM_SIZE) +#define BL1_RW_BASE (FVP_TRUSTED_SRAM_LIMIT - 0x6000) +#define BL1_RW_LIMIT FVP_TRUSTED_SRAM_LIMIT /******************************************************************************* * BL2 specific defines. @@ -124,12 +114,13 @@ * BL31 specific defines. ******************************************************************************/ /* - * Put BL3-1 at the top of the Trusted SRAM. BL31_BASE is calculated using the - * current BL3-1 debug size plus a little space for growth. + * Put BL3-1 at the top of the Trusted SRAM (just below the shared memory, if + * present). BL31_BASE is calculated using the current BL3-1 debug size plus a + * little space for growth. */ -#define BL31_BASE (TZRAM_BASE + TZRAM_SIZE - 0x1D000) +#define BL31_BASE (FVP_TRUSTED_SRAM_LIMIT - 0x1D000) #define BL31_PROGBITS_LIMIT BL1_RW_BASE -#define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE) +#define BL31_LIMIT FVP_TRUSTED_SRAM_LIMIT /******************************************************************************* * BL32 specific defines. @@ -137,22 +128,20 @@ /* * On FVP, the TSP can execute either from Trusted SRAM or Trusted DRAM. */ -#define TSP_IN_TZRAM 0 -#define TSP_IN_TZDRAM 1 - -#if TSP_RAM_LOCATION_ID == TSP_IN_TZRAM -# define TSP_SEC_MEM_BASE TZRAM_BASE -# define TSP_SEC_MEM_SIZE TZRAM_SIZE -# define BL32_BASE TZRAM_BASE +#if FVP_TSP_RAM_LOCATION_ID == FVP_IN_TRUSTED_SRAM +# define TSP_SEC_MEM_BASE FVP_TRUSTED_SRAM_BASE +# define TSP_SEC_MEM_SIZE FVP_TRUSTED_SRAM_SIZE +# define BL32_BASE FVP_TRUSTED_SRAM_BASE # define BL32_PROGBITS_LIMIT BL2_BASE # define BL32_LIMIT BL31_BASE -#elif TSP_RAM_LOCATION_ID == TSP_IN_TZDRAM -# define TSP_SEC_MEM_BASE TZDRAM_BASE -# define TSP_SEC_MEM_SIZE TZDRAM_SIZE -# define BL32_BASE (TZDRAM_BASE + 0x2000) -# define BL32_LIMIT (TZDRAM_BASE + (1 << 21)) +#elif FVP_TSP_RAM_LOCATION_ID == FVP_IN_TRUSTED_DRAM +# define TSP_SEC_MEM_BASE FVP_TRUSTED_DRAM_BASE +# define TSP_SEC_MEM_SIZE FVP_TRUSTED_DRAM_SIZE +# define BL32_BASE (FVP_TRUSTED_DRAM_BASE \ + + FVP_SHARED_RAM_SIZE) +# define BL32_LIMIT (FVP_TRUSTED_DRAM_BASE + (1 << 21)) #else -# error "Unsupported TSP_RAM_LOCATION_ID value" +# error "Unsupported FVP_TSP_RAM_LOCATION_ID value" #endif /******************************************************************************* |