diff options
| author | Achin Gupta <achin.gupta@arm.com> | 2014-07-18 18:38:28 +0100 |
|---|---|---|
| committer | Achin Gupta <achin.gupta@arm.com> | 2014-07-28 10:10:22 +0100 |
| commit | ec3c10039bdc2c1468a8ba95fbbe9de78628eea5 (patch) | |
| tree | b8781fc14291cb3afd32a49ef8bbe5f60bdf0188 /lib/aarch64 | |
| parent | 539a7b383d52493a94df4f5da8f74aa102429fa0 (diff) | |
Simplify management of SCTLR_EL3 and SCTLR_EL1
This patch reworks the manner in which the M,A, C, SA, I, WXN & EE bits of
SCTLR_EL3 & SCTLR_EL1 are managed. The EE bit is cleared immediately after reset
in EL3. The I, A and SA bits are set next in EL3 and immediately upon entry in
S-EL1. These bits are no longer managed in the blX_arch_setup() functions. They
do not have to be saved and restored either. The M, WXN and optionally the C
bit are set in the enable_mmu_elX() function. This is done during both the warm
and cold boot paths.
Fixes ARM-software/tf-issues#226
Change-Id: Ie894d1a07b8697c116960d858cd138c50bc7a069
Diffstat (limited to 'lib/aarch64')
| -rw-r--r-- | lib/aarch64/xlat_tables.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/lib/aarch64/xlat_tables.c b/lib/aarch64/xlat_tables.c index d494112..ddc9ba8 100644 --- a/lib/aarch64/xlat_tables.c +++ b/lib/aarch64/xlat_tables.c @@ -329,8 +329,7 @@ void init_xlat_tables(void) isb(); \ \ sctlr = read_sctlr_el##_el(); \ - sctlr |= SCTLR_WXN_BIT | SCTLR_M_BIT | SCTLR_I_BIT; \ - sctlr |= SCTLR_A_BIT; \ + sctlr |= SCTLR_WXN_BIT | SCTLR_M_BIT; \ \ if (flags & DISABLE_DCACHE) \ sctlr &= ~SCTLR_C_BIT; \ |