diff options
author | Andre Przywara <andre.przywara@arm.com> | 2016-04-09 00:54:17 +0100 |
---|---|---|
committer | Andre Przywara <andre.przywara@arm.com> | 2016-06-02 01:28:54 +0100 |
commit | ab576e7da6dc5416e8e7aa4d05e819a67e4cb232 (patch) | |
tree | 181f3f58135079b3602882f0705e85659959e6e6 /drivers | |
parent | 3497c6975963e1801f94aaa9b59c5b9ffeda753a (diff) |
sun50i: remove unneeded platform-specific GIC setup
The Allwinner code defined a platform specific GIC setup. However
we don't need secure IRQs or a special setup, so we can easily go with
the default ARM GIC setup provided by the driver.
Remove the unneeded code file, associated calls and code lines.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/arm/gic/arm_gic.c | 20 |
1 files changed, 2 insertions, 18 deletions
diff --git a/drivers/arm/gic/arm_gic.c b/drivers/arm/gic/arm_gic.c index c0d56e9..6cee2dc 100644 --- a/drivers/arm/gic/arm_gic.c +++ b/drivers/arm/gic/arm_gic.c @@ -40,17 +40,12 @@ #include <platform.h> #include <stdint.h> - static unsigned int g_gicc_base; static unsigned int g_gicd_base; static unsigned long g_gicr_base; static const unsigned int *g_irq_sec_ptr; static unsigned int g_num_irqs; -void gic_sunxi_distributor_init(void); -void gic_sunxi_cpuif_init(void); - - /******************************************************************************* * This function does some minimal GICv3 configuration. The Firmware itself does * not fully support GICv3 at this time and relies on GICv2 emulation as @@ -164,7 +159,6 @@ static void gicv3_cpuif_deactivate(void) ******************************************************************************/ void arm_gic_cpuif_setup(void) { - unsigned int val; assert(g_gicc_base); @@ -184,7 +178,6 @@ void arm_gic_cpuif_setup(void) gicc_write_pmr(g_gicc_base, GIC_PRI_MASK); gicc_write_ctlr(g_gicc_base, val); - } /******************************************************************************* @@ -280,7 +273,6 @@ static void arm_gic_distif_setup(void) arm_gic_pcpu_distif_setup(); gicd_write_ctlr(g_gicd_base, ctlr | ENABLE_GRP0); - } /******************************************************************************* @@ -308,16 +300,8 @@ void arm_gic_init(unsigned int gicc_base, ******************************************************************************/ void arm_gic_setup(void) { - if(0) - { - arm_gic_cpuif_setup(); - arm_gic_distif_setup(); - }else - { - gic_sunxi_cpuif_init(); - gic_sunxi_distributor_init(); - } - + arm_gic_cpuif_setup(); + arm_gic_distif_setup(); } /******************************************************************************* |