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authordanh-arm <dan.handley@arm.com>2014-07-10 14:45:19 +0100
committerdanh-arm <dan.handley@arm.com>2014-07-10 14:45:19 +0100
commit6a2231560b0243defba0721d15e824d21e5ae60b (patch)
tree69701cadcfb47c20202d65ad3e12e970d57c81a3 /docs
parent3fc938b56a55985ba46c37cf5526df0a7daa775c (diff)
parent6063379902302dfcdfa9b8978b8a0dce44bd78f7 (diff)
Merge pull request #157 from sandrine-bailleux/sb/tf-issue-109
TF issue 109
Diffstat (limited to 'docs')
-rw-r--r--docs/porting-guide.md4
1 files changed, 2 insertions, 2 deletions
diff --git a/docs/porting-guide.md b/docs/porting-guide.md
index f854af9..b39a62b 100644
--- a/docs/porting-guide.md
+++ b/docs/porting-guide.md
@@ -511,7 +511,7 @@ warm boot. For each CPU, BL1 is responsible for the following tasks:
the platform to decide where it wants to place the `meminfo` structure for
BL2.
- BL1 implements the `init_bl2_mem_layout()` function to populate the
+ BL1 implements the `bl1_init_bl2_mem_layout()` function to populate the
BL2 `meminfo` structure. The platform may override this implementation, for
example if the platform wants to restrict the amount of memory visible to
BL2. Details of how to do this are given below.
@@ -574,7 +574,7 @@ its own use.
This function helps fulfill requirement 3 above.
-### Function : init_bl2_mem_layout() [optional]
+### Function : bl1_init_bl2_mem_layout() [optional]
Argument : meminfo *, meminfo *, unsigned int, unsigned long
Return : void