diff options
author | danh-arm <dan.handley@arm.com> | 2014-07-28 14:28:40 +0100 |
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committer | danh-arm <dan.handley@arm.com> | 2014-07-28 14:28:40 +0100 |
commit | 6397bf6a99d785caa9b50016cd6c8eb76083c117 (patch) | |
tree | 5e9ffd003cb8046b7eba285907bdedf4bd8c20ba /docs | |
parent | 9fd412770f1a7d9c68731a21f157a326db3c5725 (diff) | |
parent | 8c106902368c40e14c558a0ab91cc57defdc7e81 (diff) |
Merge pull request #172 from soby-mathew/sm/asm_assert
Introduce asm assert and optimize crash reporting
Diffstat (limited to 'docs')
-rw-r--r-- | docs/porting-guide.md | 46 | ||||
-rw-r--r-- | docs/user-guide.md | 5 |
2 files changed, 50 insertions, 1 deletions
diff --git a/docs/porting-guide.md b/docs/porting-guide.md index 2bd1b56..c711590 100644 --- a/docs/porting-guide.md +++ b/docs/porting-guide.md @@ -15,6 +15,7 @@ Contents * Boot Loader stage 3-1 (BL3-1) * PSCI implementation (in BL3-1) * Interrupt Management framework (in BL3-1) + * Crash Reporting mechanism (in BL3-1) 4. C Library 5. Storage abstraction layer @@ -268,10 +269,18 @@ the following macro defined. In the ARM FVP port, this file is found in * **Macro : plat_print_gic_regs** This macro allows the crash reporting routine to print GIC registers - in case of an unhandled IRQ or FIQ in BL3-1. This aids in debugging and + in case of an unhandled exception in BL3-1. This aids in debugging and this macro can be defined to be empty in case GIC register reporting is not desired. +* **Macro : plat_print_interconnect_regs** + + This macro allows the crash reporting routine to print interconnect registers + in case of an unhandled exception in BL3-1. This aids in debugging and + this macro can be defined to be empty in case interconnect register reporting + is not desired. In the ARM FVP port, the CCI snoop control registers are + reported. + ### Other mandatory modifications The following mandatory modifications may be implemented in any file @@ -1265,6 +1274,41 @@ interrupts as Group1 interrupts. It reads the group value corresponding to the interrupt id from the relevant _Interrupt Group Register_ (`GICD_IGROUPRn`). It uses the group value to determine the type of interrupt. +3.5 Crash Reporting mechanism (in BL3-1) +---------------------------------------------- +BL3-1 implements a crash reporting mechanism which prints the various registers +of the CPU to enable quick crash analysis and debugging. It requires that a console +is designated as the crash console by the platform which will used to print the +register dump. + +The following functions must be implemented by the platform if it wants crash reporting +mechanism in BL3-1. The functions are implemented in assembly so that they can be +invoked without a C Runtime stack. + +### Function : plat_crash_console_init + + Argument : void + Return : int + +This API is used by the crash reporting mechanism to intialize the crash console. +It should only use the general purpose registers x0 to x2 to do the initiaization +and returns 1 on success. + +The FVP port designates the PL011_UART0 as the crash console and calls the +console_core_init() to initialize the console. + +### Function : plat_crash_console_putc + + Argument : int + Return : int + +This API is used by the crash reporting mechanism to print a character on the +designated crash console. It should only use general purpose registers x1 and +x2 to do its work. The parameter and the return value are in general purpose +register x0. + +The FVP port designates the PL011_UART0 as the crash console and calls the +console_core_putc() to print the character on the console. 4. C Library ------------- diff --git a/docs/user-guide.md b/docs/user-guide.md index a4d7f46..41e7606 100644 --- a/docs/user-guide.md +++ b/docs/user-guide.md @@ -181,6 +181,11 @@ performed. BL3-1. This option defaults to the value of `DEBUG` - i.e. by default this is only enabled for a debug build of the firmware. +* `ASM_ASSERTION`: This flag determines whether the assertion checks within + assembly source files are enabled or not. This option defaults to the + value of `DEBUG` - i.e. by default this is only enabled for a debug + build of the firmware. + ### Creating a Firmware Image Package FIPs are automatically created as part of the build instructions described in |