summaryrefslogtreecommitdiff
path: root/docs
diff options
context:
space:
mode:
authorJuan Castillo <juan.castillo@arm.com>2014-08-12 13:04:43 +0100
committerJuan Castillo <juan.castillo@arm.com>2014-08-12 13:34:02 +0100
commit637ebd2eb9a40847fcd93a0ae3643aba6462c561 (patch)
tree813509100979557594a49204ba5676bf3607d628 /docs
parentc1efc4c0666b95912b54e079de484d8c2249e045 (diff)
FVP: apply new naming conventions to memory regions
Secure ROM at address 0x0000_0000 is defined as FVP_TRUSTED_ROM Secure RAM at address 0x0400_0000 is defined as FVP_TRUSTED_SRAM Secure RAM at address 0x0600_0000 is defined as FVP_TRUSTED_DRAM BLn_BASE and BLn_LIMIT definitions have been updated and are based on these new memory regions. The available memory for each bootloader in the linker script is defined by BLn_BASE and BLn_LIMIT, instead of the complete memory region. TZROM_BASE/SIZE and TZRAM_BASE/SIZE are no longer required as part of the platform porting. FVP common definitions are defined in fvp_def.h while platform_def.h contains exclusively (with a few exceptions) the definitions that are mandatory in the porting guide. Therefore, platform_def.h now includes fvp_def.h instead of the other way around. Porting guide has been updated to reflect these changes. Change-Id: I39a6088eb611fc4a347db0db4b8f1f0417dbab05
Diffstat (limited to 'docs')
-rw-r--r--docs/porting-guide.md25
-rw-r--r--docs/user-guide.md4
2 files changed, 2 insertions, 27 deletions
diff --git a/docs/porting-guide.md b/docs/porting-guide.md
index db2bad8..eb3b86d 100644
--- a/docs/porting-guide.md
+++ b/docs/porting-guide.md
@@ -150,31 +150,6 @@ file is found in [plat/fvp/include/platform_def.h].
Defines the total number of nodes in the affinity heirarchy at all affinity
levels used by the platform.
-* **#define : TZROM_BASE**
-
- Defines the base address of secure ROM on the platform, where the BL1 binary
- is loaded. This constant is used by the linker scripts to ensure that the
- BL1 image fits into the available memory.
-
-* **#define : TZROM_SIZE**
-
- Defines the size of secure ROM on the platform. This constant is used by the
- linker scripts to ensure that the BL1 image fits into the available memory.
-
-* **#define : TZRAM_BASE**
-
- Defines the base address of the secure RAM on platform, where the data
- section of the BL1 binary is loaded. The BL2 and BL3-1 images are also
- loaded in this secure RAM region. This constant is used by the linker
- scripts to ensure that the BL1 data section and BL2/BL3-1 binary images fit
- into the available memory.
-
-* **#define : TZRAM_SIZE**
-
- Defines the size of the secure RAM on the platform. This constant is used by
- the linker scripts to ensure that the BL1 data section and BL2/BL3-1 binary
- images fit into the available memory.
-
* **#define : BL1_RO_BASE**
Defines the base address in secure ROM where BL1 originally lives. Must be
diff --git a/docs/user-guide.md b/docs/user-guide.md
index ef5de71..4af9c28 100644
--- a/docs/user-guide.md
+++ b/docs/user-guide.md
@@ -314,11 +314,11 @@ The Firmware Package contains this new image:
On FVP, the TSP binary runs from Trusted SRAM by default. It is also possible
to run it from Trusted DRAM. This is controlled by the build configuration
-`TSP_RAM_LOCATION`:
+`FVP_TSP_RAM_LOCATION`:
CROSS_COMPILE=<path-to-aarch64-gcc>/bin/aarch64-none-elf- \
BL33=<path-to>/<bl33_image> \
- make PLAT=fvp SPD=tspd TSP_RAM_LOCATION=tdram all fip
+ make PLAT=fvp SPD=tspd FVP_TSP_RAM_LOCATION=tdram all fip
### Checking source code style