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authorJuan Castillo <juan.castillo@arm.com>2014-07-16 15:53:43 +0100
committerJuan Castillo <juan.castillo@arm.com>2014-08-01 09:39:50 +0100
commit53fdcebd6d330183ce3e46f38bb50e838a6a60de (patch)
treec645c183657171bec5d4c8491f6d8dd360d384d9 /docs
parentdd2bdee61682df0ec65dfc43371c126a86a30c30 (diff)
Call platform_is_primary_cpu() only from reset handler
The purpose of platform_is_primary_cpu() is to determine after reset (BL1 or BL3-1 with reset handler) if the current CPU must follow the cold boot path (primary CPU), or wait in a safe state (secondary CPU) until the primary CPU has finished the system initialization. This patch removes redundant calls to platform_is_primary_cpu() in subsequent bootloader entrypoints since the reset handler already guarantees that code is executed exclusively on the primary CPU. Additionally, this patch removes the weak definition of platform_is_primary_cpu(), so the implementation of this function becomes mandatory. Removing the weak symbol avoids other bootloaders accidentally picking up an invalid definition in case the porting layer makes the real function available only to BL1. The define PRIMARY_CPU is no longer mandatory in the platform porting because platform_is_primary_cpu() hides the implementation details (for instance, there may be platforms that report the primary CPU in a system register). The primary CPU definition in FVP has been moved to fvp_def.h. The porting guide has been updated accordingly. Fixes ARM-software/tf-issues#219 Change-Id: If675a1de8e8d25122b7fef147cb238d939f90b5e
Diffstat (limited to 'docs')
-rw-r--r--docs/porting-guide.md27
1 files changed, 11 insertions, 16 deletions
diff --git a/docs/porting-guide.md b/docs/porting-guide.md
index c711590..db2bad8 100644
--- a/docs/porting-guide.md
+++ b/docs/porting-guide.md
@@ -150,11 +150,6 @@ file is found in [plat/fvp/include/platform_def.h].
Defines the total number of nodes in the affinity heirarchy at all affinity
levels used by the platform.
-* **#define : PRIMARY_CPU**
-
- Defines the `MPIDR` of the primary CPU on the platform. This value is used
- after a cold boot to distinguish between primary and secondary CPUs.
-
* **#define : TZROM_BASE**
Defines the base address of secure ROM on the platform, where the BL1 binary
@@ -360,6 +355,17 @@ requires them.
This function fulfills requirement 2 above.
+### Function : platform_is_primary_cpu() [mandatory]
+
+ Argument : unsigned long
+ Return : unsigned int
+
+This function identifies a CPU by its `MPIDR`, which is passed as the argument,
+to determine whether this CPU is the primary CPU or a secondary CPU. A return
+value of zero indicates that the CPU is not the primary CPU, while a non-zero
+return value indicates that the CPU is the primary CPU.
+
+
### Function : platform_mem_init() [mandatory]
Argument : void
@@ -398,17 +404,6 @@ maximum of 4 CPUs:
cluster_id = 8-bit value in MPIDR at affinity level 1
-### Function : platform_is_primary_cpu()
-
- Argument : unsigned long
- Return : unsigned int
-
-This function identifies a CPU by its `MPIDR`, which is passed as the argument,
-to determine whether this CPU is the primary CPU or a secondary CPU. A return
-value of zero indicates that the CPU is not the primary CPU, while a non-zero
-return value indicates that the CPU is the primary CPU.
-
-
### Function : platform_set_stack()
Argument : unsigned long