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| author | Vikram Kanigiri <vikram.kanigiri@arm.com> | 2014-05-16 18:48:12 +0100 |
|---|---|---|
| committer | Vikram Kanigiri <vikram.kanigiri@arm.com> | 2014-05-22 16:19:32 +0100 |
| commit | 6871c5d3a227cb95008a25e90e358ec0ac615222 (patch) | |
| tree | fe40950e7d517aa673ab2cc11b5255c4268ae291 /bl32/tsp/tsp_main.c | |
| parent | 4112bfa0c223eda73af1cfe57ca7dc926f767dd8 (diff) | |
Rework memory information passing to BL3-x images
The issues addressed in this patch are:
1. Remove meminfo_t from the common interfaces in BL3-x,
expecting that platform code will find a suitable mechanism
to determine the memory extents in these images and provide
it to the BL3-x images.
2. Remove meminfo_t and bl31_plat_params_t from all FVP BL3-x
code as the images use link-time information to determine
memory extents.
meminfo_t is still used by common interface in BL1/BL2 for
loading images
Change-Id: I4e825ebf6f515b59d84dc2bdddf6edbf15e2d60f
Diffstat (limited to 'bl32/tsp/tsp_main.c')
| -rw-r--r-- | bl32/tsp/tsp_main.c | 27 |
1 files changed, 19 insertions, 8 deletions
diff --git a/bl32/tsp/tsp_main.c b/bl32/tsp/tsp_main.c index a667ffc..a7c7386 100644 --- a/bl32/tsp/tsp_main.c +++ b/bl32/tsp/tsp_main.c @@ -38,6 +38,13 @@ #include <tsp.h> /******************************************************************************* + * Declarations of linker defined symbols which will help us find the layout + * of trusted SRAM + ******************************************************************************/ +extern unsigned long __RO_START__; +extern unsigned long __COHERENT_RAM_END__; + +/******************************************************************************* * Lock to control access to the console ******************************************************************************/ spinlock_t console_lock; @@ -66,6 +73,15 @@ static const entry_info_t tsp_entry_info = { tsp_cpu_suspend_entry, }; + +/******************************************************************************* + * The BL32 memory footprint starts with an RO sections and ends + * with a section for coherent RAM. Use it to find the memory size + ******************************************************************************/ +#define BL32_TOTAL_BASE (unsigned long)(&__RO_START__) + +#define BL32_TOTAL_LIMIT (unsigned long)(&__COHERENT_RAM_END__) + static tsp_args_t *set_smc_args(uint64_t arg0, uint64_t arg1, uint64_t arg2, @@ -107,10 +123,6 @@ uint64_t tsp_main(void) uint64_t mpidr = read_mpidr(); uint32_t linear_id = platform_get_core_pos(mpidr); -#if DEBUG - meminfo_t *mem_layout = bl32_plat_sec_mem_layout(); -#endif - /* Initialize the platform */ bl32_platform_setup(); @@ -123,10 +135,9 @@ uint64_t tsp_main(void) spin_lock(&console_lock); printf("TSP %s\n\r", build_message); - INFO("Total memory base : 0x%x\n", mem_layout->total_base); - INFO("Total memory size : 0x%x bytes\n", mem_layout->total_size); - INFO("Free memory base : 0x%x\n", mem_layout->free_base); - INFO("Free memory size : 0x%x bytes\n", mem_layout->free_size); + INFO("Total memory base : 0x%x\n", (unsigned long)BL32_TOTAL_BASE); + INFO("Total memory size : 0x%x bytes\n", + (unsigned long)(BL32_TOTAL_LIMIT - BL32_TOTAL_BASE)); INFO("cpu 0x%x: %d smcs, %d erets %d cpu on requests\n", mpidr, tsp_stats[linear_id].smc_count, tsp_stats[linear_id].eret_count, |