diff options
author | Andrew Thoelke <andrew.thoelke@arm.com> | 2014-05-14 17:09:32 +0100 |
---|---|---|
committer | Andrew Thoelke <andrew.thoelke@arm.com> | 2014-06-11 12:10:16 +0100 |
commit | 08ab89d324e8d784f0d35b639b7c27b4ff3e5959 (patch) | |
tree | 72e3f55c277d2db0963ac8d27508d1e937d13dd0 /bl31 | |
parent | 977fbcd4e0842e590a961d6f40c14653caa9301a (diff) |
Provide cm_get/set_context() for current CPU
All callers of cm_get_context() pass the calling CPU MPIDR to the
function. Providing a specialised version for the current
CPU results in a reduction in code size and better readability.
The current function has been renamed to cm_get_context_by_mpidr()
and the existing name is now used for the current-CPU version.
The same treatment has been done to cm_set_context(), although
only both forms are used at present in the PSCI and TSPD code.
Change-Id: I91cb0c2f7bfcb950a045dbd9ff7595751c0c0ffb
Diffstat (limited to 'bl31')
-rw-r--r-- | bl31/bl31_main.c | 7 | ||||
-rw-r--r-- | bl31/context_mgmt.c | 51 |
2 files changed, 39 insertions, 19 deletions
diff --git a/bl31/bl31_main.c b/bl31/bl31_main.c index f79a122..6765e60 100644 --- a/bl31/bl31_main.c +++ b/bl31/bl31_main.c @@ -71,9 +71,6 @@ void bl31_lib_init() ******************************************************************************/ void bl31_main(void) { -#if DEBUG - unsigned long mpidr = read_mpidr(); -#endif /* Perform remaining generic architectural setup from EL3 */ bl31_arch_setup(); @@ -98,7 +95,7 @@ void bl31_main(void) * structure which has an exception stack allocated. The PSCI * service should have set the context. */ - assert(cm_get_context(mpidr, NON_SECURE)); + assert(cm_get_context(NON_SECURE)); cm_set_next_eret_context(NON_SECURE); cm_init_pcpu_ptr_cache(); write_vbar_el3((uint64_t) runtime_exceptions); @@ -195,7 +192,7 @@ void bl31_prepare_next_image_entry() * Save the args generated in BL2 for the image in the right context * used on its entry */ - ctx = cm_get_context(read_mpidr(), image_type); + ctx = cm_get_context(image_type); gp_regs = get_gpregs_ctx(ctx); memcpy(gp_regs, (void *)&next_image_info->args, sizeof(aapcs64_params_t)); diff --git a/bl31/context_mgmt.c b/bl31/context_mgmt.c index b3dcf2d..b602840 100644 --- a/bl31/context_mgmt.c +++ b/bl31/context_mgmt.c @@ -77,10 +77,10 @@ void cm_init() /******************************************************************************* * This function returns a pointer to the most recent 'cpu_context' structure - * that was set as the context for the specified security state. NULL is - * returned if no such structure has been specified. + * for the CPU identified by MPIDR that was set as the context for the specified + * security state. NULL is returned if no such structure has been specified. ******************************************************************************/ -void *cm_get_context(uint64_t mpidr, uint32_t security_state) +void *cm_get_context_by_mpidr(uint64_t mpidr, uint32_t security_state) { uint32_t linear_id = platform_get_core_pos(mpidr); @@ -90,10 +90,24 @@ void *cm_get_context(uint64_t mpidr, uint32_t security_state) } /******************************************************************************* + * This function returns a pointer to the most recent 'cpu_context' structure + * for the calling CPU that was set as the context for the specified security + * state. NULL is returned if no such structure has been specified. + ******************************************************************************/ +void *cm_get_context(uint32_t security_state) +{ + uint32_t linear_id = platform_get_core_pos(read_mpidr()); + + assert(security_state <= NON_SECURE); + + return cm_context_info[linear_id].ptr[security_state]; +} + +/******************************************************************************* * This function sets the pointer to the current 'cpu_context' structure for the - * specified security state. + * specified security state for the CPU identified by MPIDR ******************************************************************************/ -void cm_set_context(uint64_t mpidr, void *context, uint32_t security_state) +void cm_set_context_by_mpidr(uint64_t mpidr, void *context, uint32_t security_state) { uint32_t linear_id = platform_get_core_pos(mpidr); @@ -103,6 +117,15 @@ void cm_set_context(uint64_t mpidr, void *context, uint32_t security_state) } /******************************************************************************* + * This function sets the pointer to the current 'cpu_context' structure for the + * specified security state for the calling CPU + ******************************************************************************/ +void cm_set_context(void *context, uint32_t security_state) +{ + cm_set_context_by_mpidr(read_mpidr(), context, security_state); +} + +/******************************************************************************* * The next four functions are used by runtime services to save and restore EL3 * and EL1 contexts on the 'cpu_context' structure for the specified security * state. @@ -111,7 +134,7 @@ void cm_el3_sysregs_context_save(uint32_t security_state) { cpu_context_t *ctx; - ctx = cm_get_context(read_mpidr(), security_state); + ctx = cm_get_context(security_state); assert(ctx); el3_sysregs_context_save(get_el3state_ctx(ctx)); @@ -121,7 +144,7 @@ void cm_el3_sysregs_context_restore(uint32_t security_state) { cpu_context_t *ctx; - ctx = cm_get_context(read_mpidr(), security_state); + ctx = cm_get_context(security_state); assert(ctx); el3_sysregs_context_restore(get_el3state_ctx(ctx)); @@ -131,7 +154,7 @@ void cm_el1_sysregs_context_save(uint32_t security_state) { cpu_context_t *ctx; - ctx = cm_get_context(read_mpidr(), security_state); + ctx = cm_get_context(security_state); assert(ctx); el1_sysregs_context_save(get_sysregs_ctx(ctx)); @@ -141,7 +164,7 @@ void cm_el1_sysregs_context_restore(uint32_t security_state) { cpu_context_t *ctx; - ctx = cm_get_context(read_mpidr(), security_state); + ctx = cm_get_context(security_state); assert(ctx); el1_sysregs_context_restore(get_sysregs_ctx(ctx)); @@ -159,7 +182,7 @@ void cm_set_el3_eret_context(uint32_t security_state, uint64_t entrypoint, cpu_context_t *ctx; el3_state_t *state; - ctx = cm_get_context(read_mpidr(), security_state); + ctx = cm_get_context(security_state); assert(ctx); /* Program the interrupt routing model for this security state */ @@ -183,7 +206,7 @@ void cm_set_elr_el3(uint32_t security_state, uint64_t entrypoint) cpu_context_t *ctx; el3_state_t *state; - ctx = cm_get_context(read_mpidr(), security_state); + ctx = cm_get_context(security_state); assert(ctx); /* Populate EL3 state so that ERET jumps to the correct entry */ @@ -204,7 +227,7 @@ void cm_write_scr_el3_bit(uint32_t security_state, el3_state_t *state; uint32_t scr_el3; - ctx = cm_get_context(read_mpidr(), security_state); + ctx = cm_get_context(security_state); assert(ctx); /* Ensure that the bit position is a valid one */ @@ -233,7 +256,7 @@ uint32_t cm_get_scr_el3(uint32_t security_state) cpu_context_t *ctx; el3_state_t *state; - ctx = cm_get_context(read_mpidr(), security_state); + ctx = cm_get_context(security_state); assert(ctx); /* Populate EL3 state so that ERET jumps to the correct entry */ @@ -253,7 +276,7 @@ void cm_set_next_eret_context(uint32_t security_state) uint64_t sp_mode; #endif - ctx = cm_get_context(read_mpidr(), security_state); + ctx = cm_get_context(security_state); assert(ctx); #if DEBUG |