diff options
author | Soby Mathew <soby.mathew@arm.com> | 2014-07-16 09:23:52 +0100 |
---|---|---|
committer | Soby Mathew <soby.mathew@arm.com> | 2014-07-28 11:03:20 +0100 |
commit | 8c106902368c40e14c558a0ab91cc57defdc7e81 (patch) | |
tree | 249d49989f88f5d1dbd1742bf9026eecd7749857 /bl31/aarch64 | |
parent | 626ed510f179c905a699f4663ee933c10892b4c3 (diff) |
Add CPUECTLR_EL1 and Snoop Control register to crash reporting
This patch adds the CPUECTLR_EL1 register and the CCI Snoop Control
register to the list of registers being reported when an unhandled
exception occurs.
Change-Id: I2d997f2d6ef3d7fa1fad5efe3364dc9058f9f22c
Diffstat (limited to 'bl31/aarch64')
-rw-r--r-- | bl31/aarch64/crash_reporting.S | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/bl31/aarch64/crash_reporting.S b/bl31/aarch64/crash_reporting.S index 4570514..e69878b 100644 --- a/bl31/aarch64/crash_reporting.S +++ b/bl31/aarch64/crash_reporting.S @@ -52,6 +52,9 @@ print_spacer: .asciz " =\t\t0x" +cpu_ectlr_reg: + .asciz "cpuectlr_el1 =\t\t0x" + gp_regs: .asciz "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",\ "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",\ @@ -334,9 +337,28 @@ func do_crash_reporting mrs x10, sp_el0 bl str_in_crash_buf_print + /* Print the CPUECTLR_EL1 reg */ + mrs x0, midr_el1 + lsr x0, x0, #MIDR_PN_SHIFT + and x0, x0, #MIDR_PN_MASK + cmp x0, #MIDR_PN_A57 + b.eq 1f + cmp x0, #MIDR_PN_A53 + b.ne 2f +1: + adr x4, cpu_ectlr_reg + bl asm_print_str + mrs x4, CPUECTLR_EL1 + bl asm_print_hex + bl print_newline +2: + /* Print the gic registers */ plat_print_gic_regs + /* Print the interconnect registers */ + plat_print_interconnect_regs + /* Done reporting */ b crash_panic |