Populate BL31 input parameters as per new spec

This patch is based on spec published at
https://github.com/ARM-software/tf-issues/issues/133

It rearranges the bl31_args struct into
bl31_params and bl31_plat_params which provide the
information needed for Trusted firmware and platform
specific data via x0 and x1

On the FVP platform BL3-1 params and BL3-1 plat params
and its constituents are stored at the start of TZDRAM.

The information about memory availability and size for
BL3-1, BL3-2 and BL3-3 is moved into platform specific data.

Change-Id: I8b32057a3d0dd3968ea26c2541a0714177820da9

2 files changed, 47 insertions, 41 deletions

diff --git a/bl1/aarch64/bl1_exceptions.S b/bl1/aarch64/bl1_exceptions.S
index 3613b9f..8ab9df8 100644
--- a/bl1/aarch64/bl1_exceptions.S
+++ b/bl1/aarch64/bl1_exceptions.S
@@ -117,7 +117,7 @@ SynchronousExceptionA64:
 	 * BL1 to pass EL3 control to BL31 is expected
 	 * here.
 	 * It expects X0 with RUN_IMAGE SMC function id
-	 * X1 with address of a el_change_info_t structure
+	 * X1 with address of a entry_point_info_t structure
 	 * describing the BL3-1 entrypoint
 	 * ------------------------------------------------
 	 */
@@ -136,7 +136,7 @@ SynchronousExceptionA64:
 	mov	x0, x20
 	bl	display_boot_progress
 
-	ldp	x0, x1, [x20, #EL_CHANGE_INFO_PC_OFFSET]
+	ldp	x0, x1, [x20, #ENTRY_POINT_INFO_PC_OFFSET]
 	msr	elr_el3, x0
 	msr	spsr_el3, x1
 	ubfx	x0, x1, #MODE_EL_SHIFT, #2
@@ -146,10 +146,10 @@ SynchronousExceptionA64:
 	bl	disable_mmu_icache_el3
 	tlbi	alle3
 
-	ldp	x6, x7, [x20, #(EL_CHANGE_INFO_ARGS_OFFSET + 0x30)]
-	ldp	x4, x5, [x20, #(EL_CHANGE_INFO_ARGS_OFFSET + 0x20)]
-	ldp	x2, x3, [x20, #(EL_CHANGE_INFO_ARGS_OFFSET + 0x10)]
-	ldp	x0, x1, [x20, #(EL_CHANGE_INFO_ARGS_OFFSET + 0x0)]
+	ldp	x6, x7, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x30)]
+	ldp	x4, x5, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x20)]
+	ldp	x2, x3, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x10)]
+	ldp	x0, x1, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x0)]
 	eret
 panic:
 	mov	x0, #SYNC_EXCEPTION_AARCH64
diff --git a/bl1/bl1_main.c b/bl1/bl1_main.c
index 80e52ca..da81839 100644
--- a/bl1/bl1_main.c
+++ b/bl1/bl1_main.c
@@ -33,6 +33,7 @@
 #include <assert.h>
 #include <bl_common.h>
 #include <bl1.h>
+#include <debug.h>
 #include <platform.h>
 #include <stdio.h>
 #include "bl1_private.h"
@@ -41,18 +42,18 @@
  * Runs BL2 from the given entry point. It results in dropping the
  * exception level
  ******************************************************************************/
-static void __dead2 bl1_run_bl2(el_change_info_t *bl2_ep)
+static void __dead2 bl1_run_bl2(entry_point_info_t *bl2_ep)
 {
 	bl1_arch_next_el_setup();
 
 	/* Tell next EL what we want done */
 	bl2_ep->args.arg0 = RUN_IMAGE;
 
-	if (bl2_ep->security_state == NON_SECURE)
-		change_security_state(bl2_ep->security_state);
+	if (GET_SECURITY_STATE(bl2_ep->h.attr) == NON_SECURE)
+		change_security_state(GET_SECURITY_STATE(bl2_ep->h.attr));
 
 	write_spsr_el3(bl2_ep->spsr);
-	write_elr_el3(bl2_ep->entrypoint);
+	write_elr_el3(bl2_ep->pc);
 
 	eret(bl2_ep->args.arg0,
 		bl2_ep->args.arg1,
@@ -77,11 +78,12 @@ void bl1_main(void)
 #if DEBUG
 	unsigned long sctlr_el3 = read_sctlr_el3();
 #endif
-	unsigned long bl2_base;
 	unsigned int load_type = TOP_LOAD;
+	image_info_t bl2_image_info = { {0} };
+	entry_point_info_t bl2_ep = { {0} };
 	meminfo_t *bl1_tzram_layout;
 	meminfo_t *bl2_tzram_layout = 0x0;
-	el_change_info_t bl2_ep = {0};
+	int err;
 
 	/*
 	 * Ensure that MMU/Caches and coherency are turned on
@@ -100,15 +102,28 @@ void bl1_main(void)
 	printf(FIRMWARE_WELCOME_STR);
 	printf("%s\n\r", build_message);
 
+	SET_PARAM_HEAD(&bl2_image_info, PARAM_IMAGE_BINARY, VERSION_1, 0);
+	SET_PARAM_HEAD(&bl2_ep, PARAM_EP, VERSION_1, 0);
+
 	/*
 	 * Find out how much free trusted ram remains after BL1 load
 	 * & load the BL2 image at its top
 	 */
 	bl1_tzram_layout = bl1_plat_sec_mem_layout();
-	bl2_base = load_image(bl1_tzram_layout,
+	err = load_image(bl1_tzram_layout,
 			      (const char *) BL2_IMAGE_NAME,
-			      load_type, BL2_BASE);
-
+			      load_type,
+			      BL2_BASE,
+			      &bl2_image_info,
+			      &bl2_ep);
+	if (err) {
+		/*
+		 * TODO: print failure to load BL2 but also add a tzwdog timer
+		 * which will reset the system eventually.
+		 */
+		printf("Failed to load boot loader stage 2 (BL2) firmware.\n");
+		panic();
+	}
 	/*
 	 * Create a new layout of memory for BL2 as seen by BL1 i.e.
 	 * tell it the amount of total and free memory available.
@@ -120,29 +135,20 @@ void bl1_main(void)
 	init_bl2_mem_layout(bl1_tzram_layout,
 			    bl2_tzram_layout,
 			    load_type,
-			    bl2_base);
-
-	if (bl2_base) {
-		bl2_ep.spsr =
-			SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
-		bl2_ep.entrypoint = bl2_base;
-		bl2_ep.security_state = SECURE;
-		bl2_ep.args.arg1 = (unsigned long)bl2_tzram_layout;
-		printf("Booting trusted firmware boot loader stage 2\n\r");
+			    bl2_image_info.image_base);
+
+	bl1_plat_set_bl2_ep_info(&bl2_image_info, &bl2_ep);
+	bl2_ep.args.arg1 = (unsigned long)bl2_tzram_layout;
+	printf("Booting trusted firmware boot loader stage 2\n");
 #if DEBUG
-		printf("BL2 address = 0x%llx \n\r", (unsigned long long) bl2_base);
-		printf("BL2 cpsr = 0x%x \n\r", bl2_ep.spsr);
-		printf("BL2 memory layout address = 0x%llx \n\r",
-		       (unsigned long long) bl2_tzram_layout);
+	printf("BL2 address = 0x%llx\n",
+		(unsigned long long) bl2_ep.pc);
+	printf("BL2 cpsr = 0x%x\n", bl2_ep.spsr);
+	printf("BL2 memory layout address = 0x%llx\n",
+	       (unsigned long long) bl2_tzram_layout);
 #endif
-		bl1_run_bl2(&bl2_ep);
-	}
+	bl1_run_bl2(&bl2_ep);
 
-	/*
-	 * TODO: print failure to load BL2 but also add a tzwdog timer
-	 * which will reset the system eventually.
-	 */
-	printf("Failed to load boot loader stage 2 (BL2) firmware.\n\r");
 	return;
 }
 
@@ -150,16 +156,16 @@ void bl1_main(void)
  * Temporary function to print the fact that BL2 has done its job and BL31 is
  * about to be loaded. This is needed as long as printfs cannot be used
  ******************************************************************************/
-void display_boot_progress(el_change_info_t *bl31_ep_info)
+void display_boot_progress(entry_point_info_t *bl31_ep_info)
 {
 	printf("Booting trusted firmware boot loader stage 3\n\r");
 #if DEBUG
-	printf("BL31 address = 0x%llx\n",
-			(unsigned long long)bl31_ep_info->entrypoint);
-	printf("BL31 cpsr = 0x%llx\n",
-			(unsigned long long)bl31_ep_info->spsr);
-	printf("BL31 args address = 0x%llx\n",
+	printf("BL31 address = 0x%llx\n", (unsigned long long)bl31_ep_info->pc);
+	printf("BL31 cpsr = 0x%llx\n", (unsigned long long)bl31_ep_info->spsr);
+	printf("BL31 params address = 0x%llx\n",
 			(unsigned long long)bl31_ep_info->args.arg0);
+	printf("BL31 plat params address = 0x%llx\n",
+			(unsigned long long)bl31_ep_info->args.arg1);
 #endif
 	return;
 }