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| author | Andrew Thoelke <andrew.thoelke@arm.com> | 2014-03-18 13:46:55 +0000 |
|---|---|---|
| committer | Andrew Thoelke <andrew.thoelke@arm.com> | 2014-03-26 21:54:37 +0000 |
| commit | 0a30cf54af7bb1f77b405062b1d5b44e809d0290 (patch) | |
| tree | 9b7acf35e8b41803fb7a836dce428a9924ba1587 /bl1 | |
| parent | dccc537a7243d784e0b8b81ce1634e385c3b048b (diff) | |
Place assembler functions in separate sections
This extends the --gc-sections behaviour to the many assembler
support functions in the firmware images by placing each function
into its own code section. This is achieved by creating a 'func'
macro used to declare each function label.
Fixes ARM-software/tf-issues#80
Change-Id: I301937b630add292d2dec6d2561a7fcfa6fec690
Diffstat (limited to 'bl1')
| -rw-r--r-- | bl1/aarch64/bl1_entrypoint.S | 5 | ||||
| -rw-r--r-- | bl1/aarch64/bl1_exceptions.S | 3 |
2 files changed, 3 insertions, 5 deletions
diff --git a/bl1/aarch64/bl1_entrypoint.S b/bl1/aarch64/bl1_entrypoint.S index dc63f39..012b779 100644 --- a/bl1/aarch64/bl1_entrypoint.S +++ b/bl1/aarch64/bl1_entrypoint.S @@ -29,12 +29,11 @@ */ #include <arch.h> +#include <asm_macros.S> .globl bl1_entrypoint - .section .text, "ax"; .align 3 - /* ----------------------------------------------------- * bl1_entrypoint() is the entry point into the trusted * firmware code when a cpu is released from warm or @@ -42,7 +41,7 @@ * ----------------------------------------------------- */ -bl1_entrypoint: ; .type bl1_entrypoint, %function +func bl1_entrypoint /* --------------------------------------------- * Perform any processor specific actions upon * reset e.g. cache, tlb invalidations etc. diff --git a/bl1/aarch64/bl1_exceptions.S b/bl1/aarch64/bl1_exceptions.S index a80d178..e57f228 100644 --- a/bl1/aarch64/bl1_exceptions.S +++ b/bl1/aarch64/bl1_exceptions.S @@ -178,8 +178,7 @@ SErrorA32: .align 7 - .section .text, "ax" -process_exception: +func process_exception sub sp, sp, #0x40 stp x0, x1, [sp, #0x0] stp x2, x3, [sp, #0x10] |