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authorAndre Przywara <andre.przywara@arm.com>2016-02-04 09:00:11 +0000
committerAndre Przywara <andre.przywara@arm.com>2016-02-04 09:11:48 +0000
commit82df77d9f3614b7c071394b204a32ce79e9aa5fe (patch)
tree39355aa7b1c7ae04a7c787bbe8a3314b7e36859d
parent5fec3ae8cc3d4932b59670f78187dbcd23720834 (diff)
sun50i: bl33_entry: reactivate code (but still use SVC32)
-rw-r--r--plat/sun50iw1p1/aarch64/sunxi_common.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/plat/sun50iw1p1/aarch64/sunxi_common.c b/plat/sun50iw1p1/aarch64/sunxi_common.c
index b7de9d0..b55b3a6 100644
--- a/plat/sun50iw1p1/aarch64/sunxi_common.c
+++ b/plat/sun50iw1p1/aarch64/sunxi_common.c
@@ -220,7 +220,6 @@ uint32_t sunxi_get_spsr_for_bl32_entry(void)
******************************************************************************/
uint32_t sunxi_get_spsr_for_bl33_entry(void)
{
- #if 0
unsigned long el_status;
unsigned int mode;
uint32_t spsr;
@@ -240,7 +239,7 @@ uint32_t sunxi_get_spsr_for_bl33_entry(void)
* well.
*/
spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
+ spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE,
+ DISABLE_ALL_EXCEPTIONS);
return spsr;
- #endif
- return SPSR_MODE32(MODE32_svc,SPSR_T_ARM,SPSR_E_LITTLE,DISABLE_ALL_EXCEPTIONS);
}