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authorVipin KUMAR <vipin.kumar@st.com>2012-05-22 00:15:55 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-07-07 14:07:38 +0200
commit1fa943b99d06fee8b6552f4215923e4681d4a5a4 (patch)
treef1435244a64887bc026feaa37adfa03d4f18eb4b /include
parent7f0730a02e412015b0fc4e78dc41aef14e8a3d8c (diff)
SPEAr: Configure FSMC driver for NAND interface
Since FSMC is a standard IP and it supports different memory interfaces, it is supported independent of spear platform and spear is configured to use that driver for interfacing with the NAND device Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/spear-common.h3
-rw-r--r--include/configs/spear3xx.h4
-rw-r--r--include/configs/spear6xx.h3
3 files changed, 9 insertions, 1 deletions
diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h
index ab1b33209e..8d0f0369ca 100644
--- a/include/configs/spear-common.h
+++ b/include/configs/spear-common.h
@@ -88,9 +88,10 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE
/* NAND FLASH Configuration */
+#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
-#define CONFIG_NAND_SPEAR 1
+#define CONFIG_NAND_FSMC
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE 1
diff --git a/include/configs/spear3xx.h b/include/configs/spear3xx.h
index 37bdebb392..2a86c21253 100644
--- a/include/configs/spear3xx.h
+++ b/include/configs/spear3xx.h
@@ -117,6 +117,10 @@
#endif
+/* NAND flash configuration */
+#define CONFIG_SYS_FSMC_NAND_SP
+#define CONFIG_SYS_FSMC_NAND_8BIT
+
#if defined(CONFIG_SPEAR300)
#define CONFIG_SYS_NAND_BASE (0x80000000)
diff --git a/include/configs/spear6xx.h b/include/configs/spear6xx.h
index 2ad5beb82c..c5bcc30cb7 100644
--- a/include/configs/spear6xx.h
+++ b/include/configs/spear6xx.h
@@ -38,6 +38,9 @@
#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, \
(void *)CONFIG_SYS_SERIAL1 }
+/* NAND flash configuration */
+#define CONFIG_SYS_FSMC_NAND_SP
+#define CONFIG_SYS_FSMC_NAND_8BIT
#define CONFIG_SYS_NAND_BASE (0xD2000000)
#endif /* __CONFIG_H */