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authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2016-09-18 12:24:16 +0200
committerKlaus Goger <klaus.goger@theobroma-systems.com>2016-09-18 15:57:27 +0200
commit3ccb81251d5e84f53bce17a18a21538d5f2eb0ea (patch)
treeacda0dbeabf60050abcf20c2ac291ce959c57cfb /arch
parent5a7df64aa96692ffb2043ffdda5200ef1b86fe55 (diff)
ARM: sun9i: SPI support for sun9i
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/sun9i-a80.dtsi22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/dts/sun9i-a80.dtsi b/arch/arm/dts/sun9i-a80.dtsi
index f9e277015c..3cc8566039 100644
--- a/arch/arm/dts/sun9i-a80.dtsi
+++ b/arch/arm/dts/sun9i-a80.dtsi
@@ -302,6 +302,14 @@
"mmc3_sample";
};
+ spi0_clk: clk@06000430 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-a10-mod0-clk";
+ reg = <0x06000430 0x4>;
+ clocks = <&osc24M>, <&pll12>;
+ clock-output-names = "spi0";
+ };
+
ahb0_gates: clk@06000580 {
#clock-cells = <1>;
compatible = "allwinner,sun9i-a80-ahb0-gates-clk";
@@ -913,6 +921,20 @@
#size-cells = <0>;
};
+ spi0: spi@01c1a000 {
+ compatible = "allwinner,sun6i-a31-spi";
+ reg = <0x01c1a000 0x1000>;
+/* interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; */
+ clocks = <&ahb0_gates 20>, <&spi0_clk>;
+ clock-names = "ahb", "mod";
+/*
+ dmas = <&dma 23>, <&dma 23>;
+ dma-names = "rx", "tx";
+*/
+ resets = <&ahb0_resets 20>;
+ status = "disabled";
+ };
+
r_wdt: watchdog@08001000 {
compatible = "allwinner,sun6i-a31-wdt";
reg = <0x08001000 0x20>;