diff options
| author | Jagan Teki <jteki@openedev.com> | 2015-10-23 01:38:32 +0530 |
|---|---|---|
| committer | Jagan Teki <jteki@openedev.com> | 2015-10-27 23:21:28 +0530 |
| commit | 3e1b4dcf1cb6d5edbb6a78824a2f30531ef8ea55 (patch) | |
| tree | 3f7ea29ab403d04fb522156b809e58a4eca1021e | |
| parent | a048d4bbb1079b4b70bb5fabca4661ba373fbc4b (diff) | |
spi: omap3_spi: Use BIT macro
Replace numerical bit shift with BIT macro
in omap3_spi
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
| -rw-r--r-- | drivers/spi/omap3_spi.h | 48 |
1 files changed, 24 insertions, 24 deletions
diff --git a/drivers/spi/omap3_spi.h b/drivers/spi/omap3_spi.h index 4af22c118e..fb02ea1aaf 100644 --- a/drivers/spi/omap3_spi.h +++ b/drivers/spi/omap3_spi.h @@ -52,40 +52,40 @@ struct mcspi { /* per-register bitmasks */ #define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3) -#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP (1 << 2) -#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE (1 << 0) -#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET (1 << 1) +#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP BIT(2) +#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE BIT(0) +#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET BIT(1) -#define OMAP3_MCSPI_SYSSTATUS_RESETDONE (1 << 0) +#define OMAP3_MCSPI_SYSSTATUS_RESETDONE BIT(0) -#define OMAP3_MCSPI_MODULCTRL_SINGLE (1 << 0) -#define OMAP3_MCSPI_MODULCTRL_MS (1 << 2) -#define OMAP3_MCSPI_MODULCTRL_STEST (1 << 3) +#define OMAP3_MCSPI_MODULCTRL_SINGLE BIT(0) +#define OMAP3_MCSPI_MODULCTRL_MS BIT(2) +#define OMAP3_MCSPI_MODULCTRL_STEST BIT(3) -#define OMAP3_MCSPI_CHCONF_PHA (1 << 0) -#define OMAP3_MCSPI_CHCONF_POL (1 << 1) +#define OMAP3_MCSPI_CHCONF_PHA BIT(0) +#define OMAP3_MCSPI_CHCONF_POL BIT(1) #define OMAP3_MCSPI_CHCONF_CLKD_MASK (0x0f << 2) -#define OMAP3_MCSPI_CHCONF_EPOL (1 << 6) +#define OMAP3_MCSPI_CHCONF_EPOL BIT(6) #define OMAP3_MCSPI_CHCONF_WL_MASK (0x1f << 7) #define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY (0x01 << 12) #define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY (0x02 << 12) #define OMAP3_MCSPI_CHCONF_TRM_MASK (0x03 << 12) -#define OMAP3_MCSPI_CHCONF_DMAW (1 << 14) -#define OMAP3_MCSPI_CHCONF_DMAR (1 << 15) -#define OMAP3_MCSPI_CHCONF_DPE0 (1 << 16) -#define OMAP3_MCSPI_CHCONF_DPE1 (1 << 17) -#define OMAP3_MCSPI_CHCONF_IS (1 << 18) -#define OMAP3_MCSPI_CHCONF_TURBO (1 << 19) -#define OMAP3_MCSPI_CHCONF_FORCE (1 << 20) - -#define OMAP3_MCSPI_CHSTAT_RXS (1 << 0) -#define OMAP3_MCSPI_CHSTAT_TXS (1 << 1) -#define OMAP3_MCSPI_CHSTAT_EOT (1 << 2) - -#define OMAP3_MCSPI_CHCTRL_EN (1 << 0) +#define OMAP3_MCSPI_CHCONF_DMAW BIT(14) +#define OMAP3_MCSPI_CHCONF_DMAR BIT(15) +#define OMAP3_MCSPI_CHCONF_DPE0 BIT(16) +#define OMAP3_MCSPI_CHCONF_DPE1 BIT(17) +#define OMAP3_MCSPI_CHCONF_IS BIT(18) +#define OMAP3_MCSPI_CHCONF_TURBO BIT(19) +#define OMAP3_MCSPI_CHCONF_FORCE BIT(20) + +#define OMAP3_MCSPI_CHSTAT_RXS BIT(0) +#define OMAP3_MCSPI_CHSTAT_TXS BIT(1) +#define OMAP3_MCSPI_CHSTAT_EOT BIT(2) + +#define OMAP3_MCSPI_CHCTRL_EN BIT(0) #define OMAP3_MCSPI_CHCTRL_DIS (0 << 0) -#define OMAP3_MCSPI_WAKEUPENABLE_WKEN (1 << 0) +#define OMAP3_MCSPI_WAKEUPENABLE_WKEN BIT(0) struct omap3_spi_slave { struct spi_slave slave; |