Age | Commit message (Expand) | Author |
---|---|---|
2017-11-30 | [CodeGen] Print "%vreg0" as "%0" in both MIR and debug output | Francis Visoiu Mistrih |
2015-03-18 | [Hexagon] Intrinsics for circular and bit-reversed loads and stores | Krzysztof Parzyszek |
index : ampere-computing/llvm.git | ||
LLVM including Ampere Computing toolchain specific patches |
summaryrefslogtreecommitdiff |
Age | Commit message (Expand) | Author |
---|---|---|
2017-11-30 | [CodeGen] Print "%vreg0" as "%0" in both MIR and debug output | Francis Visoiu Mistrih |
2015-03-18 | [Hexagon] Intrinsics for circular and bit-reversed loads and stores | Krzysztof Parzyszek |