8 files changed, 212 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrl-0.c b/gcc/testsuite/gcc.target/powerpc/vec-clrl-0.c
new file mode 100644
index 00000000000..d84f672c32e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-clrl-0.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+/* Vector string clear left-most bytes of unsigned char.  */
+vector unsigned char
+clrl (vector unsigned char arg, int n)
+{
+  return vec_clrl (arg, n);
+}
+
+/* { dg-final { scan-assembler {\mvclrlb\M} { target be } } } */
+/* { dg-final { scan-assembler {\mvclrrb\M} { target le } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrl-1.c b/gcc/testsuite/gcc.target/powerpc/vec-clrl-1.c
new file mode 100644
index 00000000000..d039384203e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-clrl-1.c
@@ -0,0 +1,37 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_future_hw } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+/* Vector string clear left-most bytes of unsigned char.  */
+vector unsigned char
+clrl (vector unsigned char arg, int n)
+{
+  return vec_clrl (arg, n);
+}
+
+int main (int argc, char *argv [])
+{
+  vector unsigned char input0 =
+    { 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8,
+      0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x11 };
+  vector unsigned char expected0 =
+    { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+      0x0, 0x0, 0x0, 0xc, 0xd, 0xe, 0xf, 0x11 };
+  vector unsigned char expected1 =
+    { 0x0, 0x0, 0x0, 0x4, 0x5, 0x6, 0x7, 0x8,
+      0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x11 };
+  vector unsigned char expected2 =
+    { 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8,
+      0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x11 };
+
+  if (!vec_all_eq (clrl (input0, 5), expected0))
+    abort ();
+  if (!vec_all_eq (clrl (input0, 13), expected1))
+    abort ();
+  if (!vec_all_eq (clrl (input0, 19), expected2))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrl-2.c b/gcc/testsuite/gcc.target/powerpc/vec-clrl-2.c
new file mode 100644
index 00000000000..265fe7817f6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-clrl-2.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+/* Vector string clear left-most bytes of unsigned char.  */
+vector signed char
+clrl (vector signed char arg, int n)
+{
+  return vec_clrl (arg, n);
+}
+
+/* { dg-final { scan-assembler {\mvclrlb\M} { target be } } } */
+/* { dg-final { scan-assembler {\mvclrrb\M} { target le } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrl-3.c b/gcc/testsuite/gcc.target/powerpc/vec-clrl-3.c
new file mode 100644
index 00000000000..582eb1cfd12
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-clrl-3.c
@@ -0,0 +1,37 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_future_hw } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+/* Vector string clear left-most bytes of unsigned char.  */
+vector signed char
+clrl (vector signed char arg, int n)
+{
+  return vec_clrl (arg, n);
+}
+
+int main (int argc, char *argv [])
+{
+  vector signed char input0 =
+    { 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8,
+      0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x11 };
+  vector signed char expected0 =
+    { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+      0x0, 0x0, 0x0, 0xc, 0xd, 0xe, 0xf, 0x11 };
+  vector signed char expected1 =
+    { 0x0, 0x0, 0x0, 0x4, 0x5, 0x6, 0x7, 0x8,
+      0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x11 };
+  vector signed char expected2 =
+    { 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8,
+      0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x11 };
+
+  if (!vec_all_eq (clrl (input0, 5), expected0))
+    abort ();
+  if (!vec_all_eq (clrl (input0, 13), expected1))
+    abort ();
+  if (!vec_all_eq (clrl (input0, 19), expected2))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrr-0.c b/gcc/testsuite/gcc.target/powerpc/vec-clrr-0.c
new file mode 100644
index 00000000000..59a2cf1017c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-clrr-0.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+/* Vector string clear right-most bytes of unsigned char.  */
+vector unsigned char
+clrr (vector unsigned char arg, int n)
+{
+  return vec_clrr (arg, n);
+}
+
+/* { dg-final { scan-assembler {\mvclrrb\M} { target be } } } */
+/* { dg-final { scan-assembler {\mvclrlb\M} { target le } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrr-1.c b/gcc/testsuite/gcc.target/powerpc/vec-clrr-1.c
new file mode 100644
index 00000000000..f8a3406a651
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-clrr-1.c
@@ -0,0 +1,37 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_future_hw } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+/* Vector string clear right-most bytes of unsigned char.  */
+vector unsigned char
+clrr (vector unsigned char arg, int n)
+{
+  return vec_clrr (arg, n);
+}
+
+int main (int argc, char *argv [])
+{
+  vector unsigned char input0 =
+    { 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8,
+      0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x11 };
+  vector unsigned char expected0 =
+    { 0x1, 0x2, 0x3, 0x4, 0x5, 0x0, 0x0, 0x0,
+      0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 };
+  vector unsigned char expected1 =
+    { 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8,
+      0x9, 0xa, 0xb, 0xc, 0xd, 0x0, 0x0, 0x0 };
+  vector unsigned char expected2 =
+    { 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8,
+      0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x11 };
+
+  if (!vec_all_eq (clrr(input0, 5), expected0))
+    abort ();
+  if (!vec_all_eq (clrr(input0, 13), expected1))
+    abort ();
+  if (!vec_all_eq (clrr(input0, 19), expected2))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrr-2.c b/gcc/testsuite/gcc.target/powerpc/vec-clrr-2.c
new file mode 100644
index 00000000000..5c972ca7cf3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-clrr-2.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+/* Vector string clear right-most bytes of unsigned char.  */
+vector signed char
+clrr (vector signed char arg, int n)
+{
+  return vec_clrr (arg, n);
+}
+
+/* { dg-final { scan-assembler {\mvclrrb\M} { target be } } } */
+/* { dg-final { scan-assembler {\mvclrlb\M} { target le } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrr-3.c b/gcc/testsuite/gcc.target/powerpc/vec-clrr-3.c
new file mode 100644
index 00000000000..678106a2283
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-clrr-3.c
@@ -0,0 +1,37 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_future_hw } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+/* Vector string clear right-most bytes of unsigned char.  */
+vector signed char
+clrr (vector signed char arg, int n)
+{
+  return vec_clrr (arg, n);
+}
+
+int main (int argc, char *argv [])
+{
+  vector signed char input0 =
+    { 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8,
+      0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x11 };
+  vector signed char expected0 =
+    { 0x1, 0x2, 0x3, 0x4, 0x5, 0x0, 0x0, 0x0,
+      0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 };
+  vector signed char expected1 =
+    { 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8,
+      0x9, 0xa, 0xb, 0xc, 0xd, 0x0, 0x0, 0x0 };
+  vector signed char expected2 =
+    { 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8,
+      0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x11 };
+
+  if (!vec_all_eq (clrr (input0, 5), expected0))
+    abort ();
+  if (!vec_all_eq (clrr (input0, 13), expected1))
+    abort ();
+  if (!vec_all_eq (clrr (input0, 19), expected2))
+    abort ();
+}