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| author | Richard Biener <rguenther@suse.de> | 2019-01-28 08:15:42 +0000 |
|---|---|---|
| committer | Richard Biener <rguenth@gcc.gnu.org> | 2019-01-28 08:15:42 +0000 |
| commit | ef310a95a934d0f38bed0dfdf988373a6b367e16 (patch) | |
| tree | d6d2beab2165556b6b7b68be5f16474bce7345dd /gcc/tree-cfg.c | |
| parent | 92ab6b83cdedc8e90dae97c013e1c7a824630a31 (diff) | |
re PR tree-optimization/88739 (Big-endian union bug)
2019-01-28 Richard Biener <rguenther@suse.de>
PR tree-optimization/88739
* tree-cfg.c (verify_types_in_gimple_reference): Verify
BIT_FIELD_REFs only are applied to mode-precision operands
when they are integral.
(verify_gimple_assign_ternary): Likewise for BIT_INSERT_EXPR.
* tree-ssa-sccvn.c (vn_reference_lookup_3): Avoid generating
BIT_FIELD_REFs of non-mode-precision integral operands.
From-SVN: r268332
Diffstat (limited to 'gcc/tree-cfg.c')
| -rw-r--r-- | gcc/tree-cfg.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/gcc/tree-cfg.c b/gcc/tree-cfg.c index 6041f4208b0..62254270524 100644 --- a/gcc/tree-cfg.c +++ b/gcc/tree-cfg.c @@ -3118,6 +3118,12 @@ verify_types_in_gimple_reference (tree expr, bool require_lvalue) "match field size of BIT_FIELD_REF"); return true; } + if (INTEGRAL_TYPE_P (TREE_TYPE (op)) + && !type_has_mode_precision_p (TREE_TYPE (op))) + { + error ("BIT_FIELD_REF of non-mode-precision operand"); + return true; + } if (!AGGREGATE_TYPE_P (TREE_TYPE (op)) && maybe_gt (size + bitpos, tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (op))))) @@ -4319,6 +4325,12 @@ verify_gimple_assign_ternary (gassign *stmt) error ("invalid position or size in BIT_INSERT_EXPR"); return true; } + if (INTEGRAL_TYPE_P (rhs1_type) + && !type_has_mode_precision_p (rhs1_type)) + { + error ("BIT_INSERT_EXPR into non-mode-precision operand"); + return true; + } if (INTEGRAL_TYPE_P (rhs1_type)) { unsigned HOST_WIDE_INT bitpos = tree_to_uhwi (rhs3); |