PR92398: Fix testcase failure of pr72804.c

P9LE generated instruction is not worse than P8LE.
mtvsrdd;xxlnot;stxv vs. not;not;std;std.
It can have longer latency, but latency via memory is not so critical,
and this does save decode and other resources.  It's hard to choose
which is best.  Update the test case to fix failures.

gcc/testsuite/ChangeLog:

	2019-12-02  Luo Xiong Hu  <luoxhu@linux.ibm.com>

	PR testsuite/92398
	* gcc.target/powerpc/pr72804.c: Split the store function to...
	* gcc.target/powerpc/pr92398.h: ... this one.  New.
	* gcc.target/powerpc/pr92398.p9+.c: New.
	* gcc.target/powerpc/pr92398.p9-.c: New.
	* lib/target-supports.exp (check_effective_target_p8): New.
	(check_effective_target_p9+): New.

From-SVN: r278890

1 files changed, 20 insertions, 0 deletions

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 8f25d331270..5b4cc02f921 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2585,6 +2585,26 @@ proc check_effective_target_le { } {
     }]
 }
 
+# Return 1 if we're generating code for only power8 platforms.
+
+proc check_effective_target_p8 {  } {
+  return [check_no_compiler_messages_nocache p8 assembly {
+	#if !(!defined(_ARCH_PWR9) && defined(_ARCH_PWR8))
+	#error NO
+	#endif
+  } ""]
+}
+
+# Return 1 if we're generating code for power9 and future platforms.
+
+proc check_effective_target_p9+ {  } {
+  return [check_no_compiler_messages_nocache p9+ assembly {
+	#if !(defined(_ARCH_PWR9))
+	#error NO
+	#endif
+  } ""]
+}
+
 # Return 1 if we're generating 32-bit code using default options, 0
 # otherwise.