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author | Richard Sandiford <richard.sandiford@arm.com> | 2019-09-19 09:04:28 +0000 |
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committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2019-09-19 09:04:28 +0000 |
commit | f24f4c15884bf1ee65a10e2f959842eec4198876 (patch) | |
tree | 36f90ba89bf92546561ae999a4a48cd9c5a4704f /gcc/rtl.h | |
parent | 4736041b5aa5681c44cbb9c183b11bbb781492fc (diff) |
Rework constant subreg folds and handle more variable-length cases
This patch rewrites the way simplify_subreg handles constants.
It uses similar native_encode/native_decode routines to the
tree-level handling of VIEW_CONVERT_EXPR, meaning that we can
move between rtx constants and the target memory image of them.
The main point of this patch is to support subregs of constant-length
vectors for VLA vectors, beyond the very simple cases that were already
handled. Many of the new tests failed before the patch for variable-
length vectors.
The boolean side is tested more by the upcoming SVE ACLE work.
2019-09-19 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* defaults.h (TARGET_UNIT): New macro.
(target_unit): New type.
* rtl.h (native_encode_rtx, native_decode_rtx)
(native_decode_vector_rtx, subreg_size_lsb): Declare.
(subreg_lsb_1): Turn into an inline wrapper around subreg_size_lsb.
* rtlanal.c (subreg_lsb_1): Delete.
(subreg_size_lsb): New function.
* simplify-rtx.c: Include rtx-vector-builder.h
(simplify_immed_subreg): Delete.
(native_encode_rtx, native_decode_vector_rtx, native_decode_rtx)
(simplify_const_vector_byte_offset, simplify_const_vector_subreg): New
functions.
(simplify_subreg): Use them.
(test_vector_subregs_modes, test_vector_subregs_repeating)
(test_vector_subregs_fore_back, test_vector_subregs_stepped)
(test_vector_subregs): New functions.
(test_vector_ops): Call test_vector_subregs for integer vector
modes with at least 2 elements.
From-SVN: r275959
Diffstat (limited to 'gcc/rtl.h')
-rw-r--r-- | gcc/rtl.h | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/gcc/rtl.h b/gcc/rtl.h index c054861f896..9cadac7a970 100644 --- a/gcc/rtl.h +++ b/gcc/rtl.h @@ -2406,12 +2406,30 @@ extern int rtx_cost (rtx, machine_mode, enum rtx_code, int, bool); extern int address_cost (rtx, machine_mode, addr_space_t, bool); extern void get_full_rtx_cost (rtx, machine_mode, enum rtx_code, int, struct full_rtx_costs *); +extern bool native_encode_rtx (machine_mode, rtx, vec<target_unit> &, + unsigned int, unsigned int); +extern rtx native_decode_rtx (machine_mode, vec<target_unit>, + unsigned int); +extern rtx native_decode_vector_rtx (machine_mode, vec<target_unit>, + unsigned int, unsigned int, unsigned int); extern poly_uint64 subreg_lsb (const_rtx); -extern poly_uint64 subreg_lsb_1 (machine_mode, machine_mode, poly_uint64); +extern poly_uint64 subreg_size_lsb (poly_uint64, poly_uint64, poly_uint64); extern poly_uint64 subreg_size_offset_from_lsb (poly_uint64, poly_uint64, poly_uint64); extern bool read_modify_subreg_p (const_rtx); +/* Given a subreg's OUTER_MODE, INNER_MODE, and SUBREG_BYTE, return the + bit offset at which the subreg begins (counting from the least significant + bit of the operand). */ + +inline poly_uint64 +subreg_lsb_1 (machine_mode outer_mode, machine_mode inner_mode, + poly_uint64 subreg_byte) +{ + return subreg_size_lsb (GET_MODE_SIZE (outer_mode), + GET_MODE_SIZE (inner_mode), subreg_byte); +} + /* Return the subreg byte offset for a subreg whose outer mode is OUTER_MODE, whose inner mode is INNER_MODE, and where there are LSB_SHIFT *bits* between the lsb of the outer value and the lsb of |