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| author | Bernd Edlinger <bernd.edlinger@hotmail.de> | 2019-09-05 13:40:17 +0000 |
|---|---|---|
| committer | Bernd Edlinger <edlinger@gcc.gnu.org> | 2019-09-05 13:40:17 +0000 |
| commit | 55e8f926f260342e0b89765a306a3027daeaa10e (patch) | |
| tree | 25c1b4373437ace18c3e38d785f91c245d6a530e /gcc/expr.c | |
| parent | 728347922a60d5e560a4071d23c492e8baeab115 (diff) | |
re PR target/91615 ([armeb] ICEs since r274986)
2019-09-05 Bernd Edlinger <bernd.edlinger@hotmail.de>
PR middle-end/91615
* expr.c (expand_expr_real_1): Handle misaligned TARGET_MEM_REF
without movmisalign optab.
From-SVN: r275409
Diffstat (limited to 'gcc/expr.c')
| -rw-r--r-- | gcc/expr.c | 33 |
1 files changed, 19 insertions, 14 deletions
diff --git a/gcc/expr.c b/gcc/expr.c index 0c96551ec2c..3f4c98c3f6e 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -10313,7 +10313,6 @@ expand_expr_real_1 (tree exp, rtx target, machine_mode tmode, { addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))); - enum insn_code icode; unsigned int align; op0 = addr_for_mem_ref (exp, as, true); @@ -10325,21 +10324,27 @@ expand_expr_real_1 (tree exp, rtx target, machine_mode tmode, if (modifier != EXPAND_WRITE && modifier != EXPAND_MEMORY && mode != BLKmode - && align < GET_MODE_ALIGNMENT (mode) - /* If the target does not have special handling for unaligned - loads of mode then it can use regular moves for them. */ - && ((icode = optab_handler (movmisalign_optab, mode)) - != CODE_FOR_nothing)) + && align < GET_MODE_ALIGNMENT (mode)) { - class expand_operand ops[2]; + enum insn_code icode; - /* We've already validated the memory, and we're creating a - new pseudo destination. The predicates really can't fail, - nor can the generator. */ - create_output_operand (&ops[0], NULL_RTX, mode); - create_fixed_operand (&ops[1], temp); - expand_insn (icode, 2, ops); - temp = ops[0].value; + if ((icode = optab_handler (movmisalign_optab, mode)) + != CODE_FOR_nothing) + { + class expand_operand ops[2]; + + /* We've already validated the memory, and we're creating a + new pseudo destination. The predicates really can't fail, + nor can the generator. */ + create_output_operand (&ops[0], NULL_RTX, mode); + create_fixed_operand (&ops[1], temp); + expand_insn (icode, 2, ops); + temp = ops[0].value; + } + else if (targetm.slow_unaligned_access (mode, align)) + temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode), + 0, unsignedp, NULL_RTX, + mode, mode, false, NULL); } return temp; } |