aarch64: Add support for arm_sve_vector_bits

This patch implements the "arm_sve_vector_bits" attribute, which can be
used to create fixed-length versions of an SVE type while maintaining
their "SVEness".  For example, when __ARM_FEATURE_SVE_BITS==256:

typedef svint32_t vec __attribute__((arm_sve_vector_bits(256)));

creates a 256-bit version of svint32_t.

The attribute itself is quite simple.  However, it means that we now
need to implement the full PCS rules for scalable types, whereas
previously we only needed to handle scalable types that were built
directly into the compiler.  See:

  https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst

for more information about these rules.

2020-04-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
	(aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
	(aarch64_sve2048_hw): Document.
	* config/aarch64/aarch64-protos.h
	(aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
	__ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
	* config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
	function.
	(find_type_suffix_for_scalar_type): Use it instead of comparing
	TYPE_MAIN_VARIANTs.
	(function_resolver::infer_vector_or_tuple_type): Likewise.
	(function_resolver::require_vector_type): Likewise.
	(handle_arm_sve_vector_bits_attribute): New function.
	* config/aarch64/aarch64.c (pure_scalable_type_info): New class.
	(aarch64_attribute_table): Add arm_sve_vector_bits.
	(aarch64_return_in_memory_1):
	(pure_scalable_type_info::piece::get_rtx): New function.
	(pure_scalable_type_info::num_zr): Likewise.
	(pure_scalable_type_info::num_pr): Likewise.
	(pure_scalable_type_info::get_rtx): Likewise.
	(pure_scalable_type_info::analyze): Likewise.
	(pure_scalable_type_info::analyze_registers): Likewise.
	(pure_scalable_type_info::analyze_array): Likewise.
	(pure_scalable_type_info::analyze_record): Likewise.
	(pure_scalable_type_info::add_piece): Likewise.
	(aarch64_some_values_include_pst_objects_p): Likewise.
	(aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
	to analyze whether the type is returned in SVE registers.
	(aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
	is passed in SVE registers.
	(aarch64_pass_by_reference_1): New function, extracted from...
	(aarch64_pass_by_reference): ...here.  Use pure_scalable_type_info
	to analyze whether the type is a pure scalable type and, if so,
	whether it should be passed by reference.
	(aarch64_return_in_msb): Return false for pure scalable types.
	(aarch64_function_value_1): Fold back into...
	(aarch64_function_value): ...this function.  Use
	pure_scalable_type_info to analyze whether the type is a pure
	scalable type and, if so, which registers it should use.  Handle
	types that include pure scalable types but are not themselves
	pure scalable types.
	(aarch64_return_in_memory_1): New function, split out from...
	(aarch64_return_in_memory): ...here.  Use pure_scalable_type_info
	to analyze whether the type is a pure scalable type and, if so,
	whether it should be returned by reference.
	(aarch64_layout_arg): Remove orig_mode argument.  Use
	pure_scalable_type_info to analyze whether the type is a pure
	scalable type and, if so, which registers it should use.  Handle
	types that include pure scalable types but are not themselves
	pure scalable types.
	(aarch64_function_arg): Update call accordingly.
	(aarch64_function_arg_advance): Likewise.
	(aarch64_pad_reg_upward): On big-endian targets, return false for
	pure scalable types that are smaller than 16 bytes.
	(aarch64_member_type_forces_blk): New function.
	(aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
	(aarch64_short_vector_p): Return false for VECTOR_TYPEs that
	correspond to built-in SVE types.  Do not rely on a vector mode
	if the type includes an pure scalable type.  When returning true,
	assert that the mode is not an SVE mode.
	(aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
	built-in types here.  When returning true, assert that the type
	does not have an SVE mode.
	(aarch64_can_change_mode_class): Don't allow anything to change
	between a predicate mode and a non-predicate mode.  Also don't
	allow changes between SVE vector modes and other modes that
	might be bigger than 128 bits.
	(aarch64_invalid_binary_op): Reject binary operations that mix
	SVE and GNU vector types.
	(TARGET_MEMBER_TYPE_FORCES_BLK): Define.

gcc/testsuite/
	* gcc.target/aarch64/sve/acle/general/attributes_1.c: New test.
	* gcc.target/aarch64/sve/acle/general/attributes_2.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/attributes_3.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/attributes_4.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/attributes_5.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/attributes_6.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/attributes_7.c: Likewise.
	* gcc.target/aarch64/sve/pcs/struct.h: New file.
	* gcc.target/aarch64/sve/pcs/struct_1_128.c: New test.
	* gcc.target/aarch64/sve/pcs/struct_1_256.c: Likewise.
	* gcc.target/aarch64/sve/pcs/struct_1_512.c: Likewise.
	* gcc.target/aarch64/sve/pcs/struct_1_1024.c: Likewise.
	* gcc.target/aarch64/sve/pcs/struct_1_2048.c: Likewise.
	* gcc.target/aarch64/sve/pcs/struct_2_128.c: Likewise.
	* gcc.target/aarch64/sve/pcs/struct_2_256.c: Likewise.
	* gcc.target/aarch64/sve/pcs/struct_2_512.c: Likewise.
	* gcc.target/aarch64/sve/pcs/struct_2_1024.c: Likewise.
	* gcc.target/aarch64/sve/pcs/struct_2_2048.c: Likewise.
	* gcc.target/aarch64/sve/pcs/struct_3_128.c: Likewise.
	* gcc.target/aarch64/sve/pcs/struct_3_256.c: Likewise.
	* gcc.target/aarch64/sve/pcs/struct_3_512.c: Likewise.
	* lib/target-supports.exp (check_effective_target_aarch64_sve128_hw)
	(check_effective_target_aarch64_sve512_hw)
	(check_effective_target_aarch64_sve1024_hw)
	(check_effective_target_aarch64_sve2048_hw): New procedures.

1 files changed, 9 insertions, 0 deletions

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 0bccae8eeee..de28227236a 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1992,6 +1992,15 @@ AArch64 target which generates instruction sequences for big endian.
 @item aarch64_small_fpic
 Binutils installed on test system supports relocation types required by -fpic
 for AArch64 small memory model.
+@item aarch64_sve_hw
+AArch64 target that is able to generate and execute SVE code (regardless of
+whether it does so by default).
+@item aarch64_sve128_hw
+@itemx aarch64_sve256_hw
+@itemx aarch64_sve512_hw
+@itemx aarch64_sve1024_hw
+@itemx aarch64_sve2048_hw
+Like @code{aarch64_sve_hw}, but also test for an exact hardware vector length.
 
 @end table