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authorSudakshina Das <sudi.das@arm.com>2019-01-09 14:32:06 +0000
committerSudakshina Das <sudi@gcc.gnu.org>2019-01-09 14:32:06 +0000
commitc7ff4f0fe6b9357393c7e44338c4783cf0c19759 (patch)
treedb02073be5558e36dbb273606c294c9de708594f /gcc/configure.ac
parentb5f794b47bc09930e3a05b64de0890d315631436 (diff)
[AArch64, 6/6] Enable BTI: Add configure option.
This patch is part of a series that enables ARMv8.5-A in GCC and adds Branch Target Identification Mechanism. This patch is adding a new configure option for enabling BTI and Return Address Signing by default. *** gcc/ChangeLog *** 2018-01-09 Sudakshina Das <sudi.das@arm.com> * config/aarch64/aarch64.c (aarch64_override_options): Add case to check configure option to set BTI and Return Address Signing. * configure.ac: Add --enable-standard-branch-protection and --disable-standard-branch-protection. * configure: Regenerated. * doc/install.texi: Document the same. *** gcc/testsuite/ChangeLog *** 2018-01-09 Sudakshina Das <sudi.das@arm.com> * gcc.target/aarch64/bti-1.c: Update test to not add command line option when configure with bti. * gcc.target/aarch64/bti-2.c: Likewise. * lib/target-supports.exp (check_effective_target_default_branch_protection): Add configure check for --enable-standard-branch-protection. From-SVN: r267770
Diffstat (limited to 'gcc/configure.ac')
-rw-r--r--gcc/configure.ac23
1 files changed, 23 insertions, 0 deletions
diff --git a/gcc/configure.ac b/gcc/configure.ac
index ea5edfa9ac5..e3a455817cb 100644
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -3962,6 +3962,29 @@ case "$target" in
ldr x0, [[x2, #:gotpage_lo15:globalsym]]
],,[AC_DEFINE(HAVE_AS_SMALL_PIC_RELOCS, 1,
[Define if your assembler supports relocs needed by -fpic.])])
+ # Enable Branch Target Identification Mechanism and Return Address
+ # Signing by default.
+ AC_ARG_ENABLE(standard-branch-protection,
+ [
+AS_HELP_STRING([--enable-standard-branch-protection],
+ [enable Branch Target Identification Mechanism and Return Address Signing by default for AArch64])
+AS_HELP_STRING([--disable-standard-branch-protection],
+ [disable Branch Target Identification Mechanism and Return Address Signing by default for AArch64])
+ ],
+ [
+ case $enableval in
+ yes)
+ tm_defines="${tm_defines} TARGET_ENABLE_BTI=1 TARGET_ENABLE_PAC_RET=1"
+ ;;
+ no)
+ ;;
+ *)
+ AC_MSG_ERROR(['$enableval' is an invalid value for --enable-standard-branch-protection.\
+ Valid choices are 'yes' and 'no'.])
+ ;;
+ esac
+ ],
+ [])
# Enable default workaround for AArch64 Cortex-A53 erratum 835769.
AC_ARG_ENABLE(fix-cortex-a53-835769,
[