diff options
| author | Segher Boessenkool <segher@kernel.crashing.org> | 2019-07-01 20:40:40 +0200 |
|---|---|---|
| committer | Segher Boessenkool <segher@gcc.gnu.org> | 2019-07-01 20:40:40 +0200 |
| commit | a3185de66be126c32508f7da8944585d9272d846 (patch) | |
| tree | 1890cba04390b971915bde2621149daa939f2f63 /gcc/config/rs6000/rs6000.md | |
| parent | 15f0523424fcb7eac1c6219947f74d843714aea8 (diff) | |
rs6000.md (extenddf<mode>2_fprs): Make this a parameterized name.
@extenddf<mode>2_{fprs,vsx}
* config/rs6000/rs6000.md (extenddf<mode>2_fprs): Make this a
parameterized name.
(extenddf<mode>2_vsx): Make this a parameterized name.
(extenddf<mode>2): Use those names. Simplify.
From-SVN: r272901
Diffstat (limited to 'gcc/config/rs6000/rs6000.md')
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 23 |
1 files changed, 6 insertions, 17 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 6470d95f191..21ef8d7a3ad 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -7789,31 +7789,20 @@ if (FLOAT128_IEEE_P (<MODE>mode)) rs6000_expand_float128_convert (operands[0], operands[1], false); else if (TARGET_VSX) - { - if (<MODE>mode == TFmode) - emit_insn (gen_extenddftf2_vsx (operands[0], operands[1])); - else if (<MODE>mode == IFmode) - emit_insn (gen_extenddfif2_vsx (operands[0], operands[1])); - else - gcc_unreachable (); - } - else + emit_insn (gen_extenddf2_vsx (<MODE>mode, operands[0], operands[1])); + else { rtx zero = gen_reg_rtx (DFmode); rs6000_emit_move (zero, CONST0_RTX (DFmode), DFmode); - if (<MODE>mode == TFmode) - emit_insn (gen_extenddftf2_fprs (operands[0], operands[1], zero)); - else if (<MODE>mode == IFmode) - emit_insn (gen_extenddfif2_fprs (operands[0], operands[1], zero)); - else - gcc_unreachable (); + emit_insn (gen_extenddf2_fprs (<MODE>mode, + operands[0], operands[1], zero)); } DONE; }) ;; Allow memory operands for the source to be created by the combiner. -(define_insn_and_split "extenddf<mode>2_fprs" +(define_insn_and_split "@extenddf<mode>2_fprs" [(set (match_operand:IBM128 0 "gpc_reg_operand" "=d,d,&d") (float_extend:IBM128 (match_operand:DF 1 "nonimmediate_operand" "d,m,d"))) @@ -7832,7 +7821,7 @@ operands[4] = simplify_gen_subreg (DFmode, operands[0], <MODE>mode, lo_word); }) -(define_insn_and_split "extenddf<mode>2_vsx" +(define_insn_and_split "@extenddf<mode>2_vsx" [(set (match_operand:IBM128 0 "gpc_reg_operand" "=d,d") (float_extend:IBM128 (match_operand:DF 1 "nonimmediate_operand" "wa,m")))] |