diff options
| author | Kelvin Nilsen <kelvin@gcc.gnu.org> | 2020-05-11 15:10:24 -0500 |
|---|---|---|
| committer | Bill Schmidt <wschmidt@linux.ibm.com> | 2020-05-11 15:27:24 -0500 |
| commit | 9acfb58a46ffe88ebaae0eeb341cb924702fe20c (patch) | |
| tree | 5956b34f8ef95abdab04d443874ea8fac25ddb43 /gcc/config/rs6000/rs6000.md | |
| parent | 52c5933f5838adb7bf6035e648b770b4958d137f (diff) | |
rs6000: Add cntlzdm and cnttzdm
Add support for new scalar instructions for counting leading or
trailing zeros under control of a bitmask.
[gcc]
2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
* config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
built-in function definition.
(__builtin_cnttzdm): Likewise.
* config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
(UNSPEC_CNTTZDM): Likewise.
(cntlzdm): New insn.
(cnttzdm): Likewise.
* doc/extend.texi (Basic PowerPC Built-in Functions available for
a Future Architecture): Add descriptions of __builtin_cntlzdm and
__builtin_cnttzdm functions.
[gcc/testsuite]
2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
* gcc.target/powerpc/cntlzdm-0.c: New test.
* gcc.target/powerpc/cntlzdm-1.c: New test.
* gcc.target/powerpc/cnttzdm-0.c: New test.
* gcc.target/powerpc/cnttzdm-1.c: New test.
Diffstat (limited to 'gcc/config/rs6000/rs6000.md')
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 1ceb393efde..6c9bae934d1 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -149,6 +149,8 @@ UNSPEC_PLTSEQ UNSPEC_PLT16_HA UNSPEC_CFUGED + UNSPEC_CNTLZDM + UNSPEC_CNTTZDM ]) ;; @@ -2463,6 +2465,24 @@ "cfuged %0,%1,%2" [(set_attr "type" "integer")]) +(define_insn "cntlzdm" + [(set (match_operand:DI 0 "gpc_reg_operand" "=r") + (unspec:DI [(match_operand:DI 1 "gpc_reg_operand" "r") + (match_operand:DI 2 "gpc_reg_operand" "r")] + UNSPEC_CNTLZDM))] + "TARGET_FUTURE && TARGET_POWERPC64" + "cntlzdm %0,%1,%2" + [(set_attr "type" "integer")]) + +(define_insn "cnttzdm" + [(set (match_operand:DI 0 "gpc_reg_operand" "=r") + (unspec:DI [(match_operand:DI 1 "gpc_reg_operand" "r") + (match_operand:DI 2 "gpc_reg_operand" "r")] + UNSPEC_CNTTZDM))] + "TARGET_FUTURE && TARGET_POWERPC64" + "cnttzdm %0,%1,%2" + [(set_attr "type" "integer")]) + (define_insn "cmpb<mode>3" [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") (unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r") |