diff options
| author | Andi Kleen <ak@linux.intel.com> | 2018-11-09 05:42:43 +0000 |
|---|---|---|
| committer | Andi Kleen <ak@gcc.gnu.org> | 2018-11-09 05:42:43 +0000 |
| commit | 41f8d1fc011e0da012bd00624fd2668da83d9f31 (patch) | |
| tree | 3fd8fdccf8a32f02c33d8dd6b3207f79681a4769 /gcc/common | |
| parent | 3f3284629ba481294562f8370bf45e205e1d1eec (diff) | |
Add PTWRITE builtins for x86
Add builtins/intrinsics for PTWRITE. PTWRITE is a new instruction on Intel Gemini Lake/
Goldmont Plus that allows to write values into the Processor Trace log. This allows
very light weight instrumentation of programs.
The intrinsics are compatible to icc. Automatically enabled for Goldmont Plus.
gcc/:
2018-11-08 Andi Kleen <ak@linux.intel.com>
* common/config/i386/i386-common.c (OPTION_MASK_ISA_PTWRITE_SET): New.
(OPTION_MASK_ISA_PTWRITE_UNSET): New.
(ix86_handle_option): Handle OPT_mptwrite.
* config/i386/cpuid.h (bit_PTWRITE): Add.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect ptwrite.
* config/i386/i386-builtin.def (BDESC): Add ptwrite32/64.
* config/i386/i386-c.c (ix86_target_macros_internal): Define __PTWRITE__.
* config/i386/i386.c (ix86_target_string): Handle ptwrite.
(ix86_option_override_internal): Handle PTA_PTWRITE.
(ix86_valid_target_attribute_inner_p): Define ptwrite.
(def_builtin2): Force UINT64 to be 64bit only.
* config/i386/i386.h (TARGET_PTWRITE): Add.
(TARGET_PTWRITE_P): Add.
(PTA_PTWRITE): Add.
* config/i386/i386.md: Define ptwrite.
* config/i386/i386.opt: Add -mptwrite.
* config/i386/immintrin.h (_ptwrite64): Add.
(_ptwrite32): Add
* doc/extend.texi: Document __builtin_ia32_ptwrite*.
* doc/invoke.texi: Document -mptwrite.
gcc/testsuite/:
2018-11-08 Andi Kleen <ak@linux.intel.com>
* gcc.target/i386/ptwrite1.c: New test.
* gcc.target/i386/ptwrite2.c: New test.
From-SVN: r265947
Diffstat (limited to 'gcc/common')
| -rw-r--r-- | gcc/common/config/i386/i386-common.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c index ff13ea5f69f..1017147599c 100644 --- a/gcc/common/config/i386/i386-common.c +++ b/gcc/common/config/i386/i386-common.c @@ -140,6 +140,7 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_FSGSBASE_SET OPTION_MASK_ISA_FSGSBASE #define OPTION_MASK_ISA_RDRND_SET OPTION_MASK_ISA_RDRND +#define OPTION_MASK_ISA_PTWRITE_SET OPTION_MASK_ISA_PTWRITE #define OPTION_MASK_ISA_F16C_SET \ (OPTION_MASK_ISA_F16C | OPTION_MASK_ISA_AVX_SET) #define OPTION_MASK_ISA_MWAITX_SET OPTION_MASK_ISA_MWAITX @@ -267,6 +268,7 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_FSGSBASE_UNSET OPTION_MASK_ISA_FSGSBASE #define OPTION_MASK_ISA_RDRND_UNSET OPTION_MASK_ISA_RDRND +#define OPTION_MASK_ISA_PTWRITE_UNSET OPTION_MASK_ISA_PTWRITE #define OPTION_MASK_ISA_F16C_UNSET OPTION_MASK_ISA_F16C #define OPTION_MASK_ISA_GENERAL_REGS_ONLY_UNSET \ @@ -1125,6 +1127,19 @@ ix86_handle_option (struct gcc_options *opts, } return true; + case OPT_mptwrite: + if (value) + { + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_PTWRITE_SET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_PTWRITE_SET; + } + else + { + opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_PTWRITE_UNSET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_PTWRITE_UNSET; + } + return true; + case OPT_mf16c: if (value) { |