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path: root/opcodes/aarch64-tbl.h
AgeCommit message (Expand)Author
2018-01-03Update year range in copyright notice of binutils filesAlan Modra
2017-12-19Correct disassembly of dot product instructions.Tamar Christina
2017-11-16Add new AArch64 FP16 FM{A|S} instructions.Tamar Christina
2017-11-16Correct AArch64 crypto dependencies.Tamar Christina
2017-11-16Add assembler and disassembler support for the new Armv8.4-a instructions for...Tamar Christina
2017-11-09Add the operand encoding types for the new Armv8.2-a back-ported instructions...Tamar Christina
2017-11-09Adds the new Fields and Operand types for the new instructions in Armv8.4-a.Tamar Christina
2017-11-09Split the ARM Crypto ISA extensions for AES and SHA1+2 into their own options...Tamar Christina
2017-11-08Split the AArch64 Crypto instructions for AES and SHA1+2 into their own optio...Nick Clifton
2017-06-28[AArch64] Add dot product support for AArch64 to binutilsTamar Christina
2017-04-21Fix detection of illegal AArch64 opcodes that resemble LD1R, LD2R, LD3R and L...Nick Clifton
2017-02-24[AArch64] Additional SVE instructionsRichard Sandiford
2017-02-24[AArch64] Add a "compnum" featureRichard Sandiford
2017-01-04[AArch64] Add separate feature flag for weaker release consistent load insnsSzabolcs Nagy
2017-01-02Update year range in copyright notice of all files.Alan Modra
2016-12-13[Binutils][AARCH64]Remove Cn register for coprocessor CRn, CRm fieldRenlin Li
2016-11-18[AArch64] Add ARMv8.3 FCMLA and FCADD instructionsSzabolcs Nagy
2016-11-18[AArch64] Add ARMv8.3 weaker release consistency load instructionsSzabolcs Nagy
2016-11-18[AArch64] Add ARMv8.3 javascript floating-point conversion instructionSzabolcs Nagy
2016-11-18[AArch64] Add ARMv8.3 combined pointer authentication load instructionsSzabolcs Nagy
2016-11-11[AArch64] Add ARMv8.3 combined pointer authentication branch instructionsSzabolcs Nagy
2016-11-11[AArch64] Add ARMv8.3 PACGA instructionSzabolcs Nagy
2016-11-11[AArch64] Add ARMv8.3 single source PAC instructionsSzabolcs Nagy
2016-11-11[AArch64] Add ARMv8.3 instructions which are in the NOP spaceSzabolcs Nagy
2016-09-30[AArch64] PR target/20553, fix opcode mask for SIMD multiply by elementJiong Wang
2016-09-21[AArch64][SVE 31/32] Add SVE instructionsRichard Sandiford
2016-09-21[AArch64][SVE 29/32] Add new SVE core & FP register operandsRichard Sandiford
2016-09-21[AArch64][SVE 28/32] Add SVE FP immediate operandsRichard Sandiford
2016-09-21[AArch64][SVE 27/32] Add SVE integer immediate operandsRichard Sandiford
2016-09-21[AArch64][SVE 26/32] Add SVE MUL VL addressing modesRichard Sandiford
2016-09-21[AArch64][SVE 25/32] Add support for SVE addressing modesRichard Sandiford
2016-09-21[AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALEDRichard Sandiford
2016-09-21[AArch64][SVE 23/32] Add SVE pattern and prfop operandsRichard Sandiford
2016-09-21[AArch64][SVE 21/32] Add Zn and Pn registersRichard Sandiford
2016-09-21[AArch64][SVE 20/32] Add support for tied operandsRichard Sandiford
2016-09-21[AArch64][SVE 16/32] Use specific insert/extract methods for fpimmRichard Sandiford
2016-08-23[AArch64] Add V8_2_INSN macroRichard Sandiford
2016-08-23[AArch64] Make more use of CORE/FP/SIMD_INSNRichard Sandiford
2016-08-23[AArch64] Add OP parameter to aarch64-tbl.h macrosRichard Sandiford
2016-05-03Fix generation of AArhc64 instruction table.Szabolcs Nagy
2016-04-28Add support to AArch64 disassembler for verifying instructions. Add verifier...Nick Clifton
2016-03-18Fix the disassembly of the AArch64's OOR instruction as a MOV instruction.Nick Clifton
2016-01-01Copyright update for binutilsAlan Modra
2015-12-14[AArch64][PATCH 14/14] Support FP16 Adv.SIMD Scalar Shift By Immediate instru...Matthew Wahab
2015-12-14[AArch64][PATCH 13/14] Support FP16 Adv.SIMD Shift By Immediate instructions.Matthew Wahab
2015-12-14[AArch64][PATCH 12/14] Support FP16 Adv.SIMD Scalar Pairwise instructions.Matthew Wahab
2015-12-14[AArch64][PATCH 9/14] Support FP16 Adv.SIMD Modified Immediate instructions.Matthew Wahab
2015-12-14[AArch64][PATCH 8/14] Support FP16 Adv.SIMD Across Lanes instructions.Matthew Wahab
2015-12-14[AArch64][PATCH 7/14] Support FP16 Scalar Indexed Element instructions.Matthew Wahab
2015-12-14[AArch64][PATCH 6/14] Support FP16 Vector Indexed Element instructions.Matthew Wahab
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