diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2016-09-08 07:47:31 +0100 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2016-09-21 15:04:32 +0200 |
| commit | a29e45a9c468ba254bbf18886454c53ff16bec49 (patch) | |
| tree | d73b7d81bbb74b66553fd3c6965c5f9b50b64b45 /drivers/pci/Kconfig | |
| parent | b419e87287ddb26ed991a64b2b14db7841b5f8c6 (diff) | |
pci: xilinx: Add a driver for Xilinx AXI to PCIe bridge
This patch adds a driver for the Xilinx AXI bridge for PCI express, an
IP block which can be used on some generations of Xilinx FPGAs. This is
mostly a case of implementing PCIe ECAM specification, but with some
quirks about what devices are valid to access.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/pci/Kconfig')
| -rw-r--r-- | drivers/pci/Kconfig | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 669e37bb5d..9a7c187446 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -39,4 +39,11 @@ config PCI_TEGRA with a total of 5 lanes. Some boards require this for Ethernet support to work (e.g. beaver, jetson-tk1). +config PCI_XILINX + bool "Xilinx AXI Bridge for PCI Express" + depends on DM_PCI + help + Enable support for the Xilinx AXI bridge for PCI express, an IP block + which can be used on some generations of Xilinx FPGAs. + endmenu |