diff options
| author | Andrew Dyer <adyer@righthandtech.com> | 2008-08-26 17:03:38 -0500 |
|---|---|---|
| committer | Ben Warren <biggerbadderben@gmail.com> | 2008-08-26 23:08:19 -0700 |
| commit | d26b739afe5a6760bd345743188759cd9d0f3b47 (patch) | |
| tree | e477a5d846545ff8451cbb4089d73699c0f53b93 /drivers/net/dm9000x.h | |
| parent | a1573db0c07c8ba99e9c373bb07ecd6f59da672c (diff) | |
dm9000 remove dead external phy support, gpio fix
dm9000 has code to detect and initialize external phy parts, but later
on in the code the part is forced to use the internal phy
unconditionally. Remove the unused/untested code.
change the GPIO initialization so that only the GPIO used as an
internal phy reset (hardwired in the chip) is set as an output. The
remaining GPIO need to be handled by board specific code to prevent
possible drive conflicts. Set as inputs for safety.
replace a few magic numbers with defines
Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Diffstat (limited to 'drivers/net/dm9000x.h')
| -rw-r--r-- | drivers/net/dm9000x.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/net/dm9000x.h b/drivers/net/dm9000x.h index f47ff8cb34..0d123e2e1f 100644 --- a/drivers/net/dm9000x.h +++ b/drivers/net/dm9000x.h @@ -66,6 +66,8 @@ #define NCR_FCOL (1<<4) #define NCR_FDX (1<<3) #define NCR_LBK (3<<1) +#define NCR_LBK_INT_MAC (1<<1) +#define NCR_LBK_INT_PHY (2<<1) #define NCR_RST (1<<0) #define NSR_SPEED (1<<7) @@ -107,13 +109,32 @@ #define RSR_CE (1<<1) #define RSR_FOE (1<<0) +#define EPCR_EPOS_PHY (1<<3) +#define EPCR_EPOS_EE (0<<3) +#define EPCR_ERPRR (1<<2) +#define EPCR_ERPRW (1<<1) +#define EPCR_ERRE (1<<0) + #define FCTR_HWOT(ot) (( ot & 0xf ) << 4 ) #define FCTR_LWOT(ot) ( ot & 0xf ) +#define BPTR_BPHW(x) ((x) << 4) +#define BPTR_JPT_200US (0x07) +#define BPTR_JPT_600US (0x0f) + #define IMR_PAR (1<<7) #define IMR_ROOM (1<<3) #define IMR_ROM (1<<2) #define IMR_PTM (1<<1) #define IMR_PRM (1<<0) +#define ISR_ROOS (1<<3) +#define ISR_ROS (1<<2) +#define ISR_PTS (1<<1) +#define ISR_PRS (1<<0) + +#define GPCR_GPIO0_OUT (1<<0) + +#define GPR_PHY_PWROFF (1<<0) + #endif |