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authorQuentin Schulz <quentin.schulz@theobroma-systems.com>2022-09-15 11:14:29 +0200
committerQuentin Schulz <quentin.schulz@theobroma-systems.com>2022-10-19 12:13:03 +0200
commit19070a762379be877f4c892c45e83acc21bf033a (patch)
tree3c56362037b5a40f858bc011fa3abb6932d83e04 /configs
parentb52fe8d4051aa9b8293bad762cb8b7d7d9c63214 (diff)
FROMLIST: rockchip: puma-rk3399: migrate to TPL
Depending on the toolchain used to compile the SPL for Puma RK3399-Q7 module, the board does not boot because the resulting binary is too big to fit in SRAM. Let's add a TPL so that there's no need to fiddle with or hack the defconfig to have a working bootloader. This follows what's been done for the majority of other RK3399-based boards. See the original commit for the first migrations: bdc00080111f "rockchip: rk3399: update defconfig for TPL" Unfortunately, the offset in SPI-NOR for U-Boot proper needs to be modified, since the move from SPL to TPL+SPL for idbloader.img (and the "only the first 2KB per 4KB blocks are written" "hack" for rkspi format) increased the size above 256KB. Let's move it to 512KB to, hopefully, be safe. Cc: Quentin Schulz <foss+uboot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20220915091432.789294-10-foss+uboot@0leil.net Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Diffstat (limited to 'configs')
-rw-r--r--configs/puma-rk3399_defconfig4
1 files changed, 2 insertions, 2 deletions
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 8c153e66e0..50d7591d40 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -7,7 +7,6 @@ CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-haikou"
-CONFIG_SPL_TEXT_BASE=0xff8c2000
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0
CONFIG_TARGET_PUMA_RK3399=y
@@ -31,11 +30,12 @@ CONFIG_SPL_BSS_MAX_SIZE=0x10000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_STACK=0xff8effff
CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y