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| author | Paweł Anikiel <pan@semihalf.com> | 2022-06-17 12:47:20 +0200 |
|---|---|---|
| committer | Tien Fong Chee <tien.fong.chee@intel.com> | 2022-07-01 14:57:14 +0800 |
| commit | 61298270c56d14f55e26ac17c8b5e110aa13e12c (patch) | |
| tree | 3966f414b81429a7773498eb79ddcec411114428 /configs/socfpga_chameleonv3_defconfig | |
| parent | 813c800107cc8b851375d0dd87cb841ec27f5b75 (diff) | |
config: Add Chameleonv3 config
Add defconfig and Kconfig files for Google Chameleon V3 board
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'configs/socfpga_chameleonv3_defconfig')
| -rw-r--r-- | configs/socfpga_chameleonv3_defconfig | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig new file mode 100644 index 0000000000..7870d31b09 --- /dev/null +++ b/configs/socfpga_chameleonv3_defconfig @@ -0,0 +1,29 @@ +CONFIG_ARM=y +CONFIG_ARCH_SOCFPGA=y +CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2" +CONFIG_DISTRO_DEFAULTS=y +# CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_FIT=y +CONFIG_SPL_FIT=y +CONFIG_FS_LOADER=y +CONFIG_SPL_FS_LOADER=y +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_FPGA=y +CONFIG_SPL_TEXT_BASE=0xFFE00000 +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x4400 +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_TIMER=y +CONFIG_SPL_TIMER=y +CONFIG_DESIGNWARE_APB_TIMER=y +CONFIG_MMC_DW=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_DW=y +CONFIG_MISC=y +CONFIG_MISC_INIT_R=y +CONFIG_ATSHA204A=y |