diff options
| author | Jagan Teki <jagan@amarulasolutions.com> | 2017-02-24 15:45:17 +0530 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2017-03-17 09:27:08 +0100 |
| commit | 7cf22dc8d87285ba4f82f8a0a9d7b0c33c1b9d74 (patch) | |
| tree | 0d97228baf093566a840e66cfd05080da3885bcb /board/engicam | |
| parent | cde5aa3761caec029eb1ff945c7a577e537e8544 (diff) | |
i.MX6UL: isiot: Add eMMC boot support
Boot from eMMC:
--------------
U-Boot SPL 2017.01-00314-gd0cd9cd-dirty (Jan 25 2017 - 13:25:27)
Trying to boot from MMC2
U-Boot 2017.01-00314-gd0cd9cd-dirty (Jan 25 2017 - 13:25:27 +0100)
CPU: Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 36C
Reset cause: POR
Model: Engicam Is.IoT MX6UL eMMC Starterkit
DRAM: 512 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
switch to partitions #0, OK
mmc1(part 0) is current device
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'board/engicam')
| -rw-r--r-- | board/engicam/isiotmx6ul/MAINTAINERS | 2 | ||||
| -rw-r--r-- | board/engicam/isiotmx6ul/isiotmx6ul.c | 26 |
2 files changed, 27 insertions, 1 deletions
diff --git a/board/engicam/isiotmx6ul/MAINTAINERS b/board/engicam/isiotmx6ul/MAINTAINERS index f4dcfbde17..c30cfe7c7d 100644 --- a/board/engicam/isiotmx6ul/MAINTAINERS +++ b/board/engicam/isiotmx6ul/MAINTAINERS @@ -4,7 +4,9 @@ S: Maintained F: board/engicam/isiotmx6ul F: include/configs/imx6ul_isiot.h F: configs/imx6ul_isiot_mmc_defconfig +F: configs/imx6ul_isiot_emmc_defconfig F: configs/imx6ul_isiot_nand_defconfig F: arch/arm/dts/imx6ul-isiot.dtsi F: arch/arm/dts/imx6ul-isiot-mmc.dts +F: arch/arm/dts/imx6ul-isiot-emmc.dts F: arch/arm/dts/imx6ul-isiot-nand.dts diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c b/board/engicam/isiotmx6ul/isiotmx6ul.c index 07dd50186f..9cde4fc8f2 100644 --- a/board/engicam/isiotmx6ul/isiotmx6ul.c +++ b/board/engicam/isiotmx6ul/isiotmx6ul.c @@ -153,10 +153,24 @@ static iomux_v3_cfg_t const usdhc1_pads[] = { MX6_PAD_GPIO1_IO09__GPIO1_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL), }; +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_NAND_ALE__USDHC2_RESET_B | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_WE_B__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA00__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA02__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA03__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA04__USDHC2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA05__USDHC2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + #define USDHC1_CD_GPIO IMX_GPIO_NR(1, 19) +#define USDHC2_CD_GPIO IMX_GPIO_NR(4, 5) -struct fsl_esdhc_cfg usdhc_cfg[1] = { +struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC1_BASE_ADDR, 0, 4}, + {USDHC2_BASE_ADDR, 0, 8}, }; int board_mmc_getcd(struct mmc *mmc) @@ -168,6 +182,9 @@ int board_mmc_getcd(struct mmc *mmc) case USDHC1_BASE_ADDR: ret = !gpio_get_value(USDHC1_CD_GPIO); break; + case USDHC2_BASE_ADDR: + ret = !gpio_get_value(USDHC2_CD_GPIO); + break; } return ret; @@ -181,6 +198,7 @@ int board_mmc_init(bd_t *bis) * According to the board_mmc_init() the following map is done: * (U-boot device node) (Physical Port) * mmc0 USDHC1 + * mmc1 USDHC2 */ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { switch (i) { @@ -190,6 +208,12 @@ int board_mmc_init(bd_t *bis) gpio_direction_input(USDHC1_CD_GPIO); usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); break; + case 1: + imx_iomux_v3_setup_multiple_pads( + usdhc1_pads, ARRAY_SIZE(usdhc2_pads)); + gpio_direction_input(USDHC2_CD_GPIO); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + break; default: printf("Warning - USDHC%d controller not supporting\n", i + 1); |