diff options
| author | Tom Rini <trini@konsulko.com> | 2022-09-19 08:38:32 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-09-19 08:38:32 -0400 |
| commit | c1db6be55da2fd157118425cb95145c4e737a908 (patch) | |
| tree | d33d29bb29c638b14d46a7f2e1dafff015c3acc9 /board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c | |
| parent | a0759684e015bd7252be3af508c0fcfdbb8ec5dc (diff) | |
| parent | cc74cab86a5f32db93a9f0dc7bc46fa5e83f4f3e (diff) | |
Merge tag 'u-boot-imx-20220919' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20220919
-------------------
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/13500
- Fix imx8mn-beacon-kit-u-boot
- Merged Purism
- imxrt1170 (already merged in u-boot-imx)
- Fixes in crypto FSL
- Toradex : fixes Verdin
- Serial Driver: fixes when not used as console
- DH Boards : fixes + USB
- Fix CONFIG_SYS_MALLOC_F_LEN (Kconfig)
- Add imx6ulz_smm_m2
Diffstat (limited to 'board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c')
| -rw-r--r-- | board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c b/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c index 2eda4a5956..a4c1b121c2 100644 --- a/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c +++ b/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c @@ -1799,8 +1799,8 @@ static struct dram_cfg_param ddr_phy_pie[] = { static struct dram_fsp_msg ddr_dram_fsp_msg[] = { { - /* P0 3732mts 1D */ - .drate = 3732, + /* P0 3733mts 1D */ + .drate = 3733, .fw_type = FW_1D_IMAGE, .fsp_cfg = ddr_fsp0_cfg, .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), @@ -1820,8 +1820,8 @@ static struct dram_fsp_msg ddr_dram_fsp_msg[] = { .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), }, { - /* P0 3732mts 2D */ - .drate = 3732, + /* P0 3733mts 2D */ + .drate = 3733, .fw_type = FW_2D_IMAGE, .fsp_cfg = ddr_fsp0_2d_cfg, .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), @@ -1840,5 +1840,5 @@ struct dram_timing_info dh_imx8mp_dhcom_dram_timing_32g_x32 = { .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), .ddrphy_pie = ddr_phy_pie, .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), - .fsp_table = { 3732, 400, 100, }, + .fsp_table = { 3733, 400, 100, }, }; |